Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18442743 | GROUP III NITRIDE-BASED TRANSISTOR DEVICE HAVING A CONDUCTIVE REDISTRIBUTION STRUCTURE | February 2024 | November 2025 | Allow | 21 | 3 | 0 | No | No |
| 18388882 | IMAGE SENSOR | November 2023 | September 2024 | Allow | 10 | 1 | 0 | Yes | No |
| 18447483 | SOURCE/DRAIN FEATURES WITH IMPROVED STRAIN PROPERTIES | August 2023 | January 2025 | Allow | 17 | 3 | 0 | Yes | No |
| 18230358 | METHOD OF MANUFACTURING MRAM DEVICE WITH ENHANCED ETCH CONTROL | August 2023 | December 2024 | Allow | 16 | 2 | 1 | No | No |
| 18361249 | SEMICONDUCTOR MEMORY DEVICES WITH ONE-SIDED STAIRCASE PROFILES AND METHODS OF MANUFACTURING THEREOF | July 2023 | November 2025 | Allow | 28 | 5 | 0 | Yes | No |
| 18149571 | METHOD OF FORMING SEMICONDUCTOR DEVICE WITH SILICIDE LAYER WITH DIFFERENT SILICIDE PHASES OR DIFFERENT THICKNESSES | January 2023 | February 2026 | Allow | 38 | 1 | 0 | No | No |
| 17978519 | LAYERED STRUCTURE WITH DEFORMATION CONTROL LAYER | November 2022 | June 2025 | Allow | 32 | 4 | 0 | Yes | Yes |
| 17921632 | DISPLAY DEVICE AND DISPLAY DEVICE PRODUCTION METHOD THAT PREVENTS DETERIORATION IN DISPLAY PERFORMANCE | October 2022 | December 2025 | Allow | 38 | 1 | 0 | No | No |
| 17969232 | N-TYPE 2D TRANSITION METAL DICHALCOGENIDE (TMD) TRANSISTOR | October 2022 | December 2025 | Allow | 37 | 2 | 0 | No | No |
| 17966014 | SILICON CARBIDE SEMICONDUCTOR DEVICE FOR PINCHING OFF LEAKAGE CURRENT | October 2022 | January 2026 | Allow | 39 | 2 | 0 | Yes | No |
| 17962233 | 3D NANOSHEET STACK WITH DUAL SELECTIVE CHANNEL REMOVAL OF HIGH MOBILITY CHANNELS | October 2022 | December 2025 | Abandon | 38 | 0 | 1 | No | No |
| 17914829 | INORGANIC SOLID OBJECT PATTERN MANUFACTURING METHOD AND INORGANIC SOLID OBJECT PATTERN | September 2022 | October 2025 | Abandon | 37 | 1 | 0 | No | No |
| 17884475 | SUBSTRATE FOR VERTICALLY ASSEMBLED SEMICONDUCTOR DIES | August 2022 | January 2026 | Allow | 41 | 1 | 1 | No | No |
| 17818071 | DIVIDING METHOD OF SUBSTRATE | August 2022 | March 2025 | Abandon | 31 | 1 | 0 | No | No |
| 17796166 | INTEGRATED CIRCUIT WITH FIRST SOURCE LINES AND SECOND SOURCE LINES ON DIFFERENT LAYERS AND ELECTRONIC DEVICE | July 2022 | March 2026 | Abandon | 44 | 2 | 0 | No | No |
| 17831130 | SEMICONDUCTOR STRUCTURE WITH MODIFIED SPACER AND METHOD FOR FORMING THE SAME | June 2022 | January 2026 | Allow | 44 | 1 | 1 | No | No |
| 17831418 | DISPLAY APPARATUS HAVING A REFRACTIVE LAYER | June 2022 | September 2025 | Allow | 39 | 3 | 0 | Yes | No |
| 17663676 | METHOD AND STRUCTURE FOR A LOGIC DEVICE AND ANOTHER DEVICE | May 2022 | October 2025 | Allow | 41 | 3 | 1 | Yes | No |
| 17729411 | THREE-DIMENSIONAL MEMORIES HAVING ISOLATION STRUCTURES AND FABRICATION METHODS THEREOF | April 2022 | August 2025 | Allow | 40 | 3 | 1 | Yes | No |
| 17713421 | SEMICONDUCTOR DEVICE INCLUDING A THROUGH ELECTRODE CONTACTING A BACKSIDE CONDUCTIVE PATTERN AND A FRONTSIDE CONDUCTIVE PATTERN AND A SEMICONDUCTOR PACKAGE INCLUDING THE SAME | April 2022 | December 2025 | Allow | 45 | 2 | 1 | Yes | No |
| 17657064 | SEMICONDUCTOR MODULE WITH NON-COMMON WIRING ELECTRODE AND COMMON WIRING REGION | March 2022 | August 2025 | Allow | 41 | 1 | 1 | No | No |
| 17641484 | DISPLAY PANEL WITH NARROW FRAME, AND METHOD FOR MANUFACTURING SAME | March 2022 | February 2026 | Allow | 47 | 2 | 1 | No | No |
| 17684792 | CRYSTAL FILM, SEMICONDUCTOR DEVICE INCLUDING CRYSTAL FILM, AND METHOD OF PRODUCING CRYSTAL FILM | March 2022 | July 2024 | Abandon | 28 | 2 | 1 | No | No |
| 17591205 | FERROELECTRIC MEMORY DEVICE WITH RELAXATION LAYERS | February 2022 | October 2025 | Allow | 44 | 2 | 1 | Yes | No |
| 17551346 | BIPOLAR JUNCTION TRANSISTORS WITH A NANOSHEET INTRINSIC BASE | December 2021 | December 2024 | Allow | 37 | 4 | 0 | Yes | No |
| 17548751 | CO-INTEGRATING GATE-ALL-AROUND NANOSHEET TRANSISTORS AND COMB-NANOSHEET TRANSISTORS | December 2021 | July 2025 | Allow | 43 | 1 | 1 | No | No |
| 17548712 | IMAGE SENSOR INCLUDING A SEPARATION STRUCTURE | December 2021 | October 2024 | Allow | 34 | 2 | 0 | Yes | No |
| 17549274 | SEMICONDUCTOR STORAGE DEVICE INCLUDING A FIRST STACK HAVING AN INSULATION FILM AND A CONDUCTIVE FILM ALTERNATELY STACKED | December 2021 | February 2026 | Allow | 50 | 3 | 1 | No | No |
| 17548034 | BIT LINE AND SOURCE LINE CONNECTIONS FOR A 3-DIMENSIONAL ARRAY OF MEMORY CIRCUITS | December 2021 | July 2025 | Allow | 43 | 2 | 1 | Yes | No |
| 17539677 | METHODS FOR THERMAL TREATMENT OF A SEMICONDUCTOR LAYER IN SEMICONDUCTOR DEVICE | December 2021 | February 2025 | Allow | 38 | 1 | 1 | Yes | No |
| 17539047 | METHOD FOR VERIFICATION OF CONDUCTIVITY TYPE OF SILICON WAFER | November 2021 | July 2025 | Allow | 43 | 3 | 0 | Yes | No |
| 17526219 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH SILICON CONTROLLED RECTIFIER PROTECTION CIRCUIT | November 2021 | April 2024 | Allow | 29 | 4 | 0 | Yes | No |
| 17609477 | Semiconductor Layered Structure | November 2021 | August 2024 | Abandon | 33 | 3 | 1 | No | No |
| 17511561 | FLEXIBLE LIGHT-EMITTING DEVICE, AND METHOD AND DEVICE FOR MANUFACTURING SAME | October 2021 | August 2024 | Abandon | 33 | 0 | 1 | No | No |
| 17452454 | Method for Manufacturing Semiconductor Structure Including A Nitrided Oxide Layer and Semiconductor Structure Having The Same | October 2021 | March 2025 | Abandon | 40 | 2 | 0 | Yes | No |
| 17508441 | SEMICONDUCTOR DEVICE HAVING MULTIPLE FINS ON SUBSTRATE | October 2021 | May 2025 | Allow | 43 | 3 | 1 | Yes | No |
| 17484059 | THIN-FILM TRANSISTOR SUBSTRATE HAVING FIRST AND SECOND INSULATING FILMS | September 2021 | June 2025 | Allow | 45 | 2 | 1 | No | No |
| 17436179 | SYSTEMS AND TECHNIQUES FOR FORMING SILICON-ON-OXIDE-ON-SILICON STRUCTURES | September 2021 | July 2025 | Allow | 46 | 2 | 1 | Yes | No |
| 17460327 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE INCLUDING HBNC LAYER, AND MANUFACTURING METHOD OF HBNC LAYER | August 2021 | October 2024 | Allow | 37 | 2 | 1 | Yes | No |
| 17411618 | INDEPENDENT GATE LENGTH TUNABILITY FOR STACKED TRANSISTORS | August 2021 | May 2024 | Allow | 33 | 4 | 0 | No | No |
| 17401877 | METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENTS BY METAL LIFT-OFF PROCESS AND SEMICONDUCTOR ELEMENT MANUFACTURED THEREBY | August 2021 | October 2024 | Abandon | 38 | 1 | 1 | No | No |
| 17427969 | DISPLAY SUBSTRATE AND DISPLAY DEVICE WITH LONG-TERM LIGHT EMISSION STABILITY. | August 2021 | June 2024 | Allow | 34 | 1 | 0 | No | No |
| 17384812 | SEMICONDUCTOR CHIP WITH PROTRUDING PORTION AND LIGHT-EMITTING DEVICE HAVING THE SAME | July 2021 | February 2025 | Allow | 43 | 1 | 1 | No | No |
| 17378836 | DISPLAY DEVICE IN WHICH THE OCCURENCE OF SHADING IS REDUCED WITHOUT EXCESSIVELY INCREASING THE PIXEL SPACING | July 2021 | September 2024 | Allow | 38 | 3 | 0 | Yes | No |
| 17423606 | DISLOCATION FREE SEMICONDUCTOR NANOSTRUCTURES GROWN BY PULSE LASER DEPOSITION WITH NO SEEDING OR CATALYST | July 2021 | May 2025 | Allow | 46 | 3 | 0 | No | No |
| 17376112 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT INCLUDING A PULSE DETECTION CIRCUIT | July 2021 | October 2024 | Allow | 39 | 2 | 0 | No | No |
| 17375602 | Transistor And Memory Circuitry Comprising Strings Of Memory Cells | July 2021 | May 2025 | Allow | 46 | 3 | 1 | Yes | No |
| 17423089 | LIGHT-EMITTING DEVICE AND DISPLAY DEVICE COMPRISING UNIFORMLY DISTRIBUTED LIGHT EMITTING ELEMENTS | July 2021 | May 2024 | Allow | 34 | 2 | 0 | No | No |
| 17363345 | METHOD OF MANUFACTURING AN OPTOELECTRONIC DEVICE INCLUDING A PHOTODIODE HAVING AN ACTIVE AREA AND A PHOTODIODE INSULATION | June 2021 | November 2025 | Abandon | 53 | 4 | 1 | No | No |
| 17361925 | Methods Of Forming Memory Device With Reduced Resistivity | June 2021 | October 2025 | Allow | 52 | 4 | 1 | Yes | Yes |
| 17419353 | DISPLAY PANEL WITH GROOVES AND MANUFACTURING METHOD THEREOF | June 2021 | April 2024 | Allow | 33 | 1 | 0 | No | No |
| 17416716 | SCHOTTKY BARRIER THIN FILM TRANSISTOR AND ITS METHOD OF MANUFACTURE | June 2021 | May 2024 | Abandon | 35 | 1 | 0 | No | No |
| 17352199 | SEMICONDUCTOR STRUCTURE INCLUDING DISCHARGE STRUCTURES AND METHOD FOR FABRICATING THE SAME | June 2021 | January 2025 | Allow | 43 | 3 | 1 | No | No |
| 17347365 | ACOUSTIC WAVEGUIDE WITH DIFFRACTION GRATING | June 2021 | September 2024 | Allow | 39 | 3 | 1 | No | No |
| 17345592 | IMAGE SENSOR STRUCTURE HAVING FILTER LAYER AND ABSORPTION WAVELENGTH TUNABLE PHOTOELECTRIC LAYER AND MANUFACTURING METHOD THEREOF | June 2021 | April 2024 | Allow | 34 | 1 | 1 | No | No |
| 17327725 | SEMICONDUCTOR DEVICE WITH CHANNEL PATTERN FORMED OF STACKED SEMICONDUCTOR REGIONS AND GATE ELECTRODE PARTS | May 2021 | September 2024 | Allow | 40 | 4 | 0 | Yes | No |
| 17325488 | TRANSISTORS INCLUDING SEMICONDUCTOR SURFACE MODIFICATION AND RELATED FABRICATION METHODS | May 2021 | August 2025 | Allow | 51 | 5 | 1 | Yes | No |
| 17325610 | FIELD EFFECT TRANSISTOR WITH SELECTIVE CHANNEL LAYER DOPING | May 2021 | May 2025 | Allow | 48 | 7 | 1 | No | No |
| 17314815 | Source/Drain Features With Improved Strain Properties | May 2021 | October 2024 | Allow | 42 | 4 | 1 | Yes | No |
| 17286271 | DEVICE INCLUDING VIAS AND METHOD AND MATERIAL FOR FABRICATING VIAS | April 2021 | August 2024 | Allow | 40 | 4 | 0 | No | No |
| 17231183 | SEMICONDUCTOR DEVICE HAVING A MULTILAYER SOURCE/DRAIN REGION AND METHODS OF MANUFACTURE | April 2021 | July 2024 | Allow | 39 | 4 | 0 | Yes | No |
| 17193383 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICE WITH CONNECTION PATTERN THAT CONTACTS VERTICAL CHANNEL AND SOURCE CHANNEL | March 2021 | April 2024 | Allow | 38 | 3 | 0 | Yes | No |
| 17272948 | ARRAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE FOR IMPROVING DISPLAY EFFECT | March 2021 | January 2024 | Allow | 35 | 1 | 0 | No | No |
| 17187481 | MICROELECTRONIC DEVICES INCLUDING COMPOSITE PAD STRCTURES ON STAIRCASE STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS | February 2021 | November 2024 | Allow | 44 | 4 | 1 | No | No |
| 17186032 | IMPROVED TRANSFER PRINTING FOR RF APPLICATIONS | February 2021 | September 2025 | Allow | 54 | 7 | 0 | Yes | No |
| 17183572 | INTEGRATED CIRCUIT SUPPORTS WITH MICROSTRIPS | February 2021 | July 2025 | Abandon | 53 | 2 | 1 | No | No |
| 17179875 | SEMICONDUCTOR STORAGE DEVICE INCLUDING INSULATING AREA AND ELECTRICALLY CONDUCTIVE AREA IN STACKED BODY | February 2021 | May 2024 | Abandon | 39 | 2 | 1 | Yes | No |
| 17168974 | METHOD OF MANUFACTURING MRAM DEVICE WITH ENHANCED ETCH CONTROL | February 2021 | January 2024 | Allow | 35 | 3 | 1 | No | No |
| 16824544 | MEMORY DEVICE PACKAGE WITH NOISE SHIELDING | March 2020 | April 2025 | Allow | 60 | 3 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner LOHAKARE, PRATIKSHA JAYANT.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner LOHAKARE, PRATIKSHA JAYANT works in Art Unit 2818 and has examined 45 patent applications in our dataset. With an allowance rate of 82.2%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 40 months.
Examiner LOHAKARE, PRATIKSHA JAYANT's allowance rate of 82.2% places them in the 54% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.
On average, applications examined by LOHAKARE, PRATIKSHA JAYANT receive 2.76 office actions before reaching final disposition. This places the examiner in the 81% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.
The median time to disposition (half-life) for applications examined by LOHAKARE, PRATIKSHA JAYANT is 40 months. This places the examiner in the 24% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.
Conducting an examiner interview provides a +14.0% benefit to allowance rate for applications examined by LOHAKARE, PRATIKSHA JAYANT. This interview benefit is in the 52% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.
When applicants file an RCE with this examiner, 29.7% of applications are subsequently allowed. This success rate is in the 57% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 19.4% of cases where such amendments are filed. This entry rate is in the 23% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.
When applicants request a pre-appeal conference (PAC) with this examiner, 100.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 73% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.
This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 93% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 5.4% of allowed cases (in the 81% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.