USPTO Examiner TOBERGTE NICHOLAS J - Art Unit 2817

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19207750Semiconductor Package with Integrated CapacitorsMay 2025March 2026Allow1020NoNo
19097611FIELD EFFECT TRANSISTOR INCLUDING TRANSITION METAL DICHALCOGENIDE COVERED WITH PROTECTIVE LAYER, AND METHOD OF MANUFACTURING THE SAMEApril 2025May 2025Allow100NoNo
18773010Semiconductor Package with Integrated CapacitorsJuly 2024April 2025Allow910NoNo
18758992MICROELECTRONIC ASSEMBLIES WITH COMMUNICATION NETWORKSJune 2024August 2025Allow1410NoNo
18747337Manufacturing Method for a Power MOSFET with Gate-Source ESD Diode StructureJune 2024September 2024Allow310NoNo
18740523SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFJune 2024January 2026Allow1911NoNo
18735185METHOD OF FABRICATING SEMICONDUCTOR STRUCTUREJune 2024May 2025Allow1210NoNo
18731407ORGANIC INTERPOSER INCLUDING INTRA-DIE STRUCTURAL REINFORCEMENT STRUCTURES AND METHODS OF FORMING THE SAMEJune 2024March 2025Allow910NoNo
18679941SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE, AND GAS CONCENTRATION MEASURING DEVICEMay 2024January 2025Allow810NoNo
18668887SEMICONDUCTOR DEVICES WITH FLEXIBLE REINFORCEMENT STRUCTUREMay 2024April 2025Allow1110NoNo
18662916METHODS OF FABRICATING PACKAGE STRUCTUREMay 2024March 2025Allow1010NoNo
18662075PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAMEMay 2024February 2026Allow2110NoNo
18652515APPARATUSES INCLUDING BALL GRID ARRAYS AND ASSOCIATED SYSTEMSMay 2024January 2025Allow910NoNo
18624686PACKAGE STRUCTURE CONTAINING CHIP STRUCTURE WITH INCLINED SIDEWALLSApril 2024September 2025Allow1830NoNo
18616245ORGANIC ELECTROLUMINESCENT DEVICESMarch 2024October 2024Allow700NoNo
18613089DISPLAY PANELMarch 2024October 2024Allow700NoNo
18599472ORGANIC ELECTROLUMINESCENT DEVICESMarch 2024September 2024Allow700NoNo
18597684MICROELECTRONIC ASSEMBLIES WITH COMMUNICATION NETWORKSMarch 2024January 2025Allow1010NoNo
18590585REDISTRIBUTION STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEFebruary 2024March 2025Allow1310NoNo
18590718SEMICONDUCTOR PACKAGE INCLUDING AN ELECTROMAGNETIC SHIELD AND METHOD OF FABRICATING THE SAMEFebruary 2024September 2025Abandon1810NoNo
18412583MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGEJanuary 2024December 2024Allow1110NoNo
18399885SOURCE/DRAIN REGIONS IN INTEGRATED CIRCUIT STRUCTURESDecember 2023April 2025Allow1520YesNo
18390051Semiconductor Device and Method of Forming Semiconductor Package with RF Antenna Interposer Having High Dielectric EncapsulationDecember 2023December 2024Allow1210NoNo
18539847DISPLAY SUBSTRATE AND DISPLAY DEVICEDecember 2023October 2024Allow1010NoNo
18535375ELECTRICAL REDUNDANCY FOR BONDED STRUCTURESDecember 2023November 2024Allow1210NoNo
18522537SEMICONDUCTOR DEVICE INCLUDING INSULATING ELEMENT AND METHOD OF MAKINGNovember 2023November 2025Allow2311NoNo
18515264SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAMENovember 2023September 2024Allow1010NoNo
18507759Bl-LAYER ALLOY LINER FOR INTERCONNECT METALLIZATION AND METHODS OF FORMING THE SAMENovember 2023March 2025Allow1610NoNo
18501065Quantum Dot Light-Emitting Device, Manufacturing Method and Display DeviceNovember 2023August 2024Allow1010NoNo
18386728MULTILAYER ELECTRICAL CONDUCTORS FOR TRANSFER PRINTINGNovember 2023December 2025Allow2520NoNo
18473609METAL-ASSISTED DELAYED FLUORESCENT MATERIALS AS CO-HOST MATERIALS FOR FLUORESCENT OLEDSSeptember 2023September 2024Allow1210NoNo
18244350INTERPOSER AND SEMICONDUCTOR PACKAGE INCLUDING THE SAMESeptember 2023July 2024Allow1010NoNo
18240026ORGANIC LIGHT EMITTING DIODE AND ORGANIC LIGHT EMITTING DISPLAY DEVICE INCLUDING THE SAMEAugust 2023October 2025Allow2600NoNo
18451727ELECTRICAL REDUNDANCY FOR BONDED STRUCTURESAugust 2023June 2024Allow1010NoNo
18447443SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURINGAugust 2023November 2024Allow1510NoNo
18366779Magnetic Tunnel Junction Device and Method of Forming SameAugust 2023July 2024Allow1110NoNo
18230718COMPUTATIONAL ANALYSIS OF BIOLOGICAL DATA USING MANIFOLD AND A HYPERPLANEAugust 2023June 2024Allow1010NoNo
18228787LOGIC DRIVE BASED ON CHIP SCALE PACKAGE COMPRISING STANDARDIZED COMMODITY PROGRAMMABLE LOGIC IC CHIP AND MEMORY IC CHIPAugust 2023March 2025Allow6000NoNo
18362973METHODS OF FABRICATING THE SAME DIE STACK STRUCTURE AND SEMICONDUCTOR STRUCTUREAugust 2023July 2024Allow1110NoNo
18361933METALLIZATION STRUCTUREJuly 2023November 2024Allow1510NoNo
18361917SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFJuly 2023March 2024Allow700NoNo
18361332Package Structure and Method and Equipment for Forming the SameJuly 2023February 2024Allow700NoNo
18227451SYSTEMS AND METHODS FOR PROVIDING DYNAMIC SECURITY FABRIC INTERPOSERS IN HETEROGENEOUSLY INTEGRATED SYSTEMSJuly 2023February 2026Allow3110NoNo
18359864SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFJuly 2023February 2025Allow1820NoNo
18358400SEMICONDUCTOR DEVICEJuly 2023November 2025Allow2800NoNo
18357224INTEGRATED CIRCUIT FILLER AND METHOD THEREOFJuly 2023August 2024Allow1310NoNo
18216102MICROELECTRONIC ASSEMBLIES WITH COMMUNICATION NETWORKSJune 2023May 2024Allow1010NoNo
18343888SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJune 2023December 2024Allow1720NoNo
18344182Semiconductor Device and Method of Forming Hybrid TIM LayersJune 2023July 2024Allow1320NoNo
18342755SEMICONDUCTOR STRUCTURE HAVING PHOTONIC DIE AND ELECTRONIC DIEJune 2023May 2025Allow2210NoNo
18340387Reinforcing Package Using Reinforcing PatchesJune 2023May 2024Allow1110NoNo
18340380WAFER LEVEL CHIP SCALE PACKAGE HAVING VARYING THICKNESSESJune 2023March 2025Allow2011NoNo
18333951SEMICONDUCTOR DEVICEJune 2023August 2025Allow2700NoNo
18332863SEMICONDUCTOR PACKAGE WITH TSV INDUCTORJune 2023July 2024Allow1310YesNo
18331249TRIM WALL PROTECTION METHOD FOR MULTI-WAFER STACKINGJune 2023June 2024Allow1310NoNo
18331589ELECTRONIC COMPONENT AND METHOD FOR FORMING RESIN LAYER ON ELECTRONIC COMPONENTJune 2023February 2026Allow3210YesNo
18253945WIRELESS CHIP-TO-CHIP HIGH-SPEED DATA TRANSPORTMay 2023February 2026Allow3310YesNo
18199824INTERCONNECTION STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR PACKAGE INCLUDING INTERCONNECTION STRUCTUREMay 2023January 2024Allow800NoNo
18315463SEMICONDUCTOR PACKAGESMay 2023January 2025Allow2120NoNo
18313475SWITCHING LAYER SCHEME TO ENHANCE RRAM PERFORMANCEMay 2023April 2024Allow1110NoNo
18312801APPARATUSES INCLUDING BALL GRID ARRAYS AND ASSOCIATED SYSTEMS AND METHODSMay 2023January 2024Allow810NoNo
18311621SEMICONDUCTOR PACKAGEMay 2023September 2024Allow1710YesNo
18138948SEMICONDUCTOR DEVICEApril 2023September 2025Allow2900NoNo
18303543METHOD OF FABRICATING SEMICONDUCTOR STRUCTUREApril 2023March 2024Allow1110NoNo
18303240Metal Etching Stop Layer in Magnetic Tunnel Junction Memory CellsApril 2023February 2026Allow3420NoNo
18302500Semiconductor Package and Method of ManufactureApril 2023August 2025Allow2810NoNo
18301246INDUCTOR STRUCTURE, SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOFApril 2023April 2024Allow1211NoNo
18300372HIGH ELECTRON MOBILITY TRANSISTOR DEVICE AND MANUFACTURING METHOD THEREOFApril 2023July 2025Allow2700NoNo
18300175Semiconductor Device and Method of ManufactureApril 2023August 2024Allow1620NoNo
18298379WAFER-LEVEL HETEROGENEOUS DIES INTEGRATION STRUCTURE AND METHODApril 2023November 2023Allow700NoNo
18194381SEMICONDUCTOR PACKAGE INCLUDING AN ELECTROMAGNETIC SHIELD AND METHOD OF FABRICATING THE SAMEMarch 2023November 2023Allow800NoNo
18128952MICROELECTRONIC ASSEMBLIES HAVING AN INTEGRATED CAPACITORMarch 2023May 2024Allow1400NoNo
18189834INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAMEMarch 2023July 2025Allow2810YesNo
18122224SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFMarch 2023March 2026Allow3611NoNo
18121189ORGANIC INTERPOSER INCLUDING INTRA-DIE STRUCTURAL REINFORCEMENT STRUCTURES AND METHODS OF FORMING THE SAMEMarch 2023March 2024Allow1210NoNo
18183924SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEMarch 2023September 2023Allow600NoNo
18183062SEMICONDUCTOR PACKAGEMarch 2023October 2024Allow1910NoNo
18119396ORGANIC ELECTROLUMINESCENT DEVICESMarch 2023January 2024Allow1110NoNo
18180563SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEMarch 2023March 2026Allow3610YesNo
18110994SEMICONDUCTOR PACKAGEFebruary 2023October 2025Allow3200NoNo
18169303CHIP PACKAGING STRUCTURE AND METHOD FOR PREPARING THE SAME, AND METHOD FOR PACKAGING SEMICONDUCTOR STRUCTUREFebruary 2023July 2025Allow2900NoNo
18107991DISPLAY PANEL, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICEFebruary 2023February 2025Allow2410NoNo
18165928MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGEFebruary 2023February 2024Allow1300NoNo
18165808DISPLAY DEVICEFebruary 2023September 2025Allow3110NoNo
18106225SEMICONDUCTOR DEVICES WITH FLEXIBLE REINFORCEMENT STRUCTUREFebruary 2023January 2024Allow1110NoNo
18105970SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESFebruary 2023May 2024Allow1500NoNo
18161707METHOD FOR POLISHING SUBSTRATE INCLUDING FUNCTIONAL CHIPJanuary 2023December 2025Abandon3410NoNo
18099715METHOD FOR FORMING MARK, PACKAGING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE HAVING THE MARKJanuary 2023August 2025Allow3100NoNo
18098158SEMICONDUCTOR PACKAGEJanuary 2023November 2024Allow2220YesNo
18152496TRANSIENT-SUBSTRATE ASSEMBLY AND MANUFACTURING METHOD THEREOFJanuary 2023December 2025Abandon3510NoNo
18152615Package with Improved Heat Dissipation Efficiency and Method for Forming the SameJanuary 2023February 2026Allow3701NoNo
18152453INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAMEJanuary 2023February 2026Allow3711NoNo
18093499DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME, AND TILED DISPLAY DEVICE INCLUDING THE SAMEJanuary 2023August 2025Allow3110NoNo
18149793Integrated Circuit Packages and Methods of Forming the SameJanuary 2023March 2026Allow3811NoNo
18091072SEMICONDUCTOR PACKAGE WITH INTERPOSER INCLUDING RECESSDecember 2022January 2026Allow3610YesNo
18145047SEMICONDUCTOR PACKAGE INCLUDING ANTENNA AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGEDecember 2022January 2026Allow3711NoNo
18086545SEMICONDUCTOR DEVICE, CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOFDecember 2022September 2024Allow2111NoNo
18083809PLASMONIC OLEDs AND VERTICAL DIPOLE EMITTERSDecember 2022December 2023Allow1210NoNo
18067221SEMICONDUCTOR PACKAGE STRUCTURE HAVING ANTENNA ARRAYDecember 2022January 2026Allow3711NoNo
18067060SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEDecember 2022July 2025Allow3101NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner TOBERGTE, NICHOLAS J.

Strategic Value of Filing an Appeal

Total Appeal Filings
4
Allowed After Appeal Filing
2
(50.0%)
Not Allowed After Appeal Filing
2
(50.0%)
Filing Benefit Percentile
80.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 50.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner TOBERGTE, NICHOLAS J - Prosecution Strategy Guide

Executive Summary

Examiner TOBERGTE, NICHOLAS J works in Art Unit 2817 and has examined 469 patent applications in our dataset. With an allowance rate of 97.9%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner TOBERGTE, NICHOLAS J's allowance rate of 97.9% places them in the 90% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by TOBERGTE, NICHOLAS J receive 1.00 office actions before reaching final disposition. This places the examiner in the 10% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by TOBERGTE, NICHOLAS J is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -1.8% benefit to allowance rate for applications examined by TOBERGTE, NICHOLAS J. This interview benefit is in the 9% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.7% of applications are subsequently allowed. This success rate is in the 80% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 70.0% of cases where such amendments are filed. This entry rate is in the 92% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 133.3% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 86% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 92% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 13.6% are granted (fully or in part). This grant rate is in the 8% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 2.6% of allowed cases (in the 77% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 4.4% of allowed cases (in the 79% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.