Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18758926 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME | June 2024 | April 2025 | Allow | 9 | 0 | 0 | No | No |
| 18751953 | SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE | June 2024 | January 2025 | Allow | 7 | 0 | 0 | No | No |
| 18638120 | Semiconductor Devices Having Funnel-Shaped Gate Structures | April 2024 | December 2024 | Allow | 8 | 0 | 0 | No | No |
| 18622981 | ARRAY SUBSTRATE AND DISPLAY PANEL | March 2024 | February 2025 | Allow | 46 | 1 | 0 | No | No |
| 18590747 | FILLING OPENINGS BY COMBINING NON-FLOWABLE AND FLOWABLE PROCESSES | February 2024 | January 2025 | Allow | 10 | 1 | 0 | No | No |
| 18443297 | SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR INCLUDING HORIZONTAL GATE STRUCTURE AND VERTICAL CHANNEL LAYER AND METHOD FOR FABRICATING THE SAME | February 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18423738 | INDEPENDENT CONTROL OF STACKED SEMICONDUCTOR DEVICE | January 2024 | January 2025 | Allow | 12 | 1 | 0 | Yes | No |
| 18395918 | GROUND-CONNECTED SUPPORTS WITH INSULATING SPACERS FOR SEMICONDUCTOR MEMORY CAPACITORS AND METHOD OF FABRICATING THE SAME | December 2023 | January 2025 | Allow | 13 | 1 | 0 | Yes | No |
| 18504344 | POWER SEMICONDUCTOR DEVICE WITH REDUCED STRAIN | November 2023 | August 2024 | Allow | 9 | 1 | 0 | No | No |
| 18380616 | SEMICONDUCTOR DEVICE WITH SHALLOW TRENCH ISOLATION HAVING MULTI-STACKED LAYERS AND METHOD OF FORMING THE SAME | October 2023 | November 2024 | Allow | 13 | 1 | 1 | No | No |
| 18484710 | SEMICONDUCTOR DEVICE WITH IMPROVED BREAKDOWN VOLTAGE | October 2023 | October 2024 | Allow | 12 | 1 | 0 | No | No |
| 18475977 | METHOD FOR PREPARING A SURFACE FOR DIRECT-BONDING | September 2023 | February 2025 | Allow | 17 | 1 | 1 | No | No |
| 18453717 | SEMICONDUCTOR DEVICE WITH SEMICONDUCTOR MESAS BETWEEN ADJACENT GATE TRENCHES | August 2023 | July 2024 | Allow | 11 | 1 | 1 | No | No |
| 18232640 | MOON-SHAPED BOTTOM SPACER FOR VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR (VTFET) DEVICES | August 2023 | July 2024 | Allow | 11 | 1 | 0 | No | No |
| 18361566 | HYBRID ISOLATION REGIONS HAVING UPPER AND LOWER PORTIONS WITH SEAMS | July 2023 | June 2024 | Allow | 10 | 1 | 0 | No | No |
| 18358282 | Radiation Hardened High Voltage Superjunction MOSFET | July 2023 | October 2024 | Allow | 15 | 3 | 0 | No | No |
| 18355494 | PIZOELECTRIC MEMS DEVICE WITH ELECTRODES HAVING LOW SURFACE ROUGHNESS | July 2023 | August 2024 | Allow | 13 | 1 | 0 | No | No |
| 18220989 | Vertical Power Semiconductor Device and Manufacturing Method | July 2023 | October 2024 | Allow | 15 | 2 | 0 | No | No |
| 18221285 | HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES | July 2023 | April 2024 | Allow | 9 | 1 | 0 | Yes | No |
| 18209559 | SHIFT REGISTER AND DISPLAY DEVICE AND DRIVING METHOD THEREOF | June 2023 | July 2024 | Allow | 13 | 1 | 0 | No | No |
| 18314850 | BOTTOM SOURCE/DRAIN ETCH WITH FIN-CUT-LAST-VTFET | May 2023 | April 2024 | Allow | 12 | 1 | 1 | Yes | No |
| 18308937 | PATTERNING METHODS FOR SEMICONDUCTOR DEVICES | April 2023 | April 2024 | Allow | 12 | 1 | 0 | No | No |
| 18136984 | SEMICONDUCTOR DEVICE WITH CAPPING CONDUCTIVE LAYER ON AN ELECTRODE AND METHOD OF FABRICATING THE SAME | April 2023 | February 2025 | Allow | 22 | 1 | 1 | Yes | No |
| 18134509 | DISPLAY DEVICE INCLUDING A PAD WHERE A DRIVING CHIP IS MOUNTED | April 2023 | March 2024 | Allow | 11 | 1 | 0 | No | No |
| 18183276 | STATIC RANDOM ACCESS MEMORY USING VERTICAL TRANSPORT FIELD EFFECT TRANSISTORS | March 2023 | February 2024 | Allow | 11 | 1 | 0 | Yes | No |
| 18176427 | METHOD OF FORMING VIAS IN A GaN/DIAMOND WAFER | February 2023 | November 2024 | Allow | 21 | 1 | 0 | No | No |
| 18088467 | FILLING OPENINGS BY COMBINING NON-FLOWABLE AND FLOWABLE PROCESSES | December 2022 | January 2024 | Allow | 13 | 1 | 1 | No | No |
| 18080933 | SEMICONDUCTOR DEVICE HAVING THERMALLY CONDUCTIVE ELECTRODES | December 2022 | August 2023 | Allow | 8 | 1 | 0 | No | No |
| 18077790 | HIGH VOLTAGE EDGE TERMINATION STRUCTURE FOR POWER SEMICONDUCTOR DEVICES | December 2022 | August 2024 | Allow | 21 | 3 | 0 | No | No |
| 18077731 | HIGH VOLTAGE EDGE TERMINATION STRUCTURE FOR POWER SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREOF | December 2022 | May 2024 | Allow | 17 | 2 | 1 | No | No |
| 18077670 | HIGH VOLTAGE EDGE TERMINATION STRUCTURE FOR POWER SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREOF | December 2022 | July 2024 | Allow | 20 | 3 | 0 | No | No |
| 18063086 | UP-DIFFUSION SUPPRESSION IN A POWER MOSFET | December 2022 | January 2024 | Allow | 13 | 0 | 1 | No | No |
| 18062524 | CHARGE-BALANCE POWER DEVICE, AND PROCESS FOR MANUFACTURING THE CHARGE-BALANCE POWER DEVICE | December 2022 | May 2024 | Allow | 18 | 2 | 0 | Yes | No |
| 18060972 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | December 2022 | June 2023 | Allow | 6 | 0 | 0 | No | No |
| 18071168 | VERTICAL FIELD EFFECT TRANSISTOR (VFET) STRUCTURE WITH DIELECTRIC PROTECTION LAYER AND METHOD OF MANUFACTURING THE SAME | November 2022 | August 2023 | Allow | 9 | 1 | 0 | Yes | No |
| 17966817 | PRECISE BOTTOM JUNCTION FORMATION FOR VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR WITH HIGHLY DOPED EPITAXIAL SOURCE/DRAIN, SHARP JUNCTION GRADIENT, AND/OR REDUCED PARASITIC CAPACITANCE | October 2022 | May 2024 | Allow | 19 | 1 | 0 | Yes | No |
| 18046791 | SEMICONDUCTOR DEVICE WITH SPACER OF GRADUALLY CHANGED THICKNESS AND MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE | October 2022 | March 2023 | Allow | 5 | 0 | 0 | No | No |
| 18046780 | SEMICONDUCTOR DEVICE WITH SPACER OF GRADUALLY CHANGED THICKNESS AND MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE | October 2022 | September 2023 | Allow | 11 | 1 | 0 | No | No |
| 17936202 | VERTICAL-TRANSPORT FIELD-EFFECT TRANSISTOR WITH BACKSIDE GATE CONTACT | September 2022 | July 2025 | Allow | 33 | 1 | 0 | No | No |
| 17933142 | SEMICONDUCTOR MEMORY DEVICE WITH NANOWIRE STRUCTURE AND FORMING METHOD THEREOF | September 2022 | June 2025 | Allow | 33 | 1 | 1 | No | No |
| 17903644 | LOCAL ENLARGED VIA-TO-BACKSIDE POWER RAIL | September 2022 | May 2025 | Allow | 32 | 1 | 0 | No | No |
| 17901416 | MANAFACTURING METHOD FOR POWER MOSFET SEMICONDUCTOR DEVICE WITH IMPROVED BREAKDOWN VOLTAGE | September 2022 | July 2023 | Allow | 11 | 1 | 0 | No | No |
| 17895299 | VERTICAL FIELD-EFFECT TRANSISTOR WITH ISOLATION PILLARS | August 2022 | May 2025 | Allow | 32 | 1 | 0 | No | No |
| 17886496 | DISPLAY DEVICE | August 2022 | March 2024 | Allow | 19 | 1 | 0 | No | No |
| 17884090 | ULTRA-SHALLOW DOPANT AND OHMIC CONTACT REGIONS BY SOLID STATE DIFFUSION | August 2022 | May 2025 | Allow | 34 | 1 | 0 | No | No |
| 17881926 | Semiconductor Device Including Insulated Gate Bipolar Transistor | August 2022 | October 2024 | Allow | 26 | 3 | 1 | No | Yes |
| 17815396 | INDEPENDENT CONTROL OF STACKED SEMICONDUCTOR DEVICE | July 2022 | October 2023 | Allow | 15 | 0 | 0 | No | No |
| 17874281 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING ETCHING POLYSILICON | July 2022 | February 2024 | Allow | 18 | 1 | 0 | No | No |
| 17813862 | Formation of Hybrid Isolation Regions Through Recess and Re-Deposition | July 2022 | July 2023 | Allow | 12 | 0 | 0 | No | No |
| 17869586 | Methods Used In Forming Memory Arrays Having Strings of Memory Cells | July 2022 | June 2025 | Allow | 35 | 1 | 1 | No | No |
| 17866803 | METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE | July 2022 | March 2024 | Allow | 20 | 1 | 0 | No | No |
| 17866603 | SEMICONDUCTOR STRUCTURE | July 2022 | July 2024 | Allow | 24 | 3 | 0 | Yes | No |
| 17866986 | SEMICONDUCTOR DEVICES HAVING GATE STRUCTURES WITH SLANTED SIDEWALLS | July 2022 | January 2024 | Allow | 18 | 1 | 0 | No | No |
| 17811588 | METHOD FOR FORMING GATE METAL STRUCTURE HAVING PORTIONS WITH DIFFERENT HEIGHTS | July 2022 | May 2023 | Allow | 10 | 1 | 0 | No | No |
| 17848481 | LAYOUT STRUCTURE OF FLEXIBLE CIRCUIT BOARD | June 2022 | April 2025 | Abandon | 34 | 1 | 0 | No | No |
| 17839682 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | June 2022 | August 2023 | Allow | 14 | 1 | 0 | No | No |
| 17838780 | INTEGRATED MEMS ELECTROSTATIC MICRO-SPEAKER DEVICE AND METHOD | June 2022 | February 2025 | Allow | 32 | 1 | 0 | No | No |
| 17783624 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | June 2022 | September 2024 | Allow | 27 | 0 | 0 | No | No |
| 17830874 | VERTICAL TUNNELING FIELD-EFFECT TRANSISTOR WITH ENHANCED CURRENT CONFINEMENT | June 2022 | October 2024 | Allow | 29 | 0 | 1 | No | No |
| 17804491 | Radiation Hardened High Voltage Superjunction MOSFET | May 2022 | June 2023 | Allow | 12 | 1 | 1 | No | No |
| 17738049 | CONTACT STRUCTURE FOR TRANSISTOR DEVICES | May 2022 | August 2023 | Allow | 15 | 1 | 1 | No | No |
| 17729728 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME | April 2022 | July 2023 | Allow | 15 | 1 | 1 | No | No |
| 17727091 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE | April 2022 | July 2023 | Abandon | 15 | 1 | 0 | No | No |
| 17726536 | METHOD OF MANUFACTURING MOSFET HAVING A SEMICONDUCTOR BASE SUBSTRATE WITH A SUPER JUNCTION STRUCTURE | April 2022 | September 2023 | Allow | 17 | 2 | 0 | No | No |
| 17725015 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING | April 2022 | June 2025 | Allow | 38 | 2 | 1 | No | No |
| 17721236 | THIN FILM TUNNEL FIELD EFFECT TRANSISTORS HAVING RELATIVELY INCREASED WIDTH | April 2022 | April 2023 | Allow | 12 | 1 | 0 | No | No |
| 17716555 | Power Semiconductor Device Having a Control Cell for Controlling a Load Current | April 2022 | May 2024 | Allow | 25 | 1 | 1 | No | No |
| 17712750 | SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER | April 2022 | January 2025 | Allow | 33 | 0 | 1 | No | No |
| 17705540 | Methods Of Forming Epitaxial Source/Drain Features In Semiconductor Devices | March 2022 | July 2024 | Allow | 28 | 3 | 0 | No | No |
| 17704109 | SHIFT REGISTER AND DISPLAY DEVICE AND DRIVING METHOD THEREOF | March 2022 | September 2023 | Abandon | 18 | 1 | 0 | No | No |
| 17656277 | TRANSISTOR STRUCTURE WITH MULTI-LAYER FIELD PLATE AND RELATED METHOD | March 2022 | September 2024 | Allow | 30 | 1 | 1 | Yes | No |
| 17700853 | Semiconductor Circuit with Metal Structure and Manufacturing Method | March 2022 | March 2023 | Allow | 12 | 1 | 0 | No | No |
| 17697400 | VERTICAL CHANNEL TRANSISTOR INCLUDING A GRAPHENE INSERTION LAYER BEWEEEN A SOURCE/DRAIN ELECTRODE AND A CHANNEL PATTERN | March 2022 | April 2025 | Allow | 37 | 1 | 0 | Yes | No |
| 17695207 | SEMICONDUCTOR DEVICE INCLUDING A TRENCH STRUCTURE HAVING A TRENCH DIELECTRIC STRUCTURE WITH A GAP | March 2022 | March 2025 | Allow | 36 | 3 | 0 | No | No |
| 17685896 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME | March 2022 | January 2025 | Allow | 34 | 1 | 1 | No | No |
| 17681853 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR STORAGE DEVICE | February 2022 | September 2024 | Allow | 31 | 0 | 1 | No | No |
| 17681019 | BOND ENHANCEMENT STRUCTURE IN MICROELECTRONICS FOR TRAPPING CONTAMINANTS DURING DIRECT-BONDING PROCESSES | February 2022 | March 2024 | Allow | 24 | 1 | 0 | No | No |
| 17651606 | SEMICONDUCTOR DEVICE THAT INCLUDES AT LEAST FOUR SEMICONDUCTOR REGIONS | February 2022 | September 2024 | Allow | 31 | 1 | 0 | No | No |
| 17674422 | Ferroelectric Random Access Memory Devices and Methods | February 2022 | May 2023 | Allow | 14 | 0 | 0 | No | No |
| 17636284 | ORGANIC PHOTOELECTRIC CONVERSION MATERIAL | February 2022 | September 2024 | Allow | 31 | 1 | 0 | Yes | No |
| 17670521 | METHOD OF FORMING A SEMICONDUCTOR TRANSISTOR HAVING AN EPITAXIAL CHANNEL LAYER | February 2022 | January 2023 | Allow | 11 | 1 | 0 | No | No |
| 17671533 | SEMICONDUCTOR MEMORY DEVICE INCLUDING VERTICAL CELL STRUCTURE AND METHOD OF FABRICATING THE SAME | February 2022 | February 2025 | Allow | 36 | 1 | 1 | Yes | No |
| 17669309 | SEMICONDUCTOR DEVICE WITH MULTIPLE ELECTRODES AND AN INSULATION FILM | February 2022 | December 2024 | Allow | 34 | 1 | 1 | No | No |
| 17632286 | Semiconductor Device and Junction Edge Region Thereof | February 2022 | May 2024 | Allow | 27 | 1 | 0 | No | No |
| 17586680 | INTEGRATED CIRCUIT PACKAGES WITH CAVITIES AND METHODS OF MANUFACTURING THE SAME | January 2022 | August 2024 | Allow | 30 | 3 | 1 | No | No |
| 17585284 | SEMICONDUCTOR PROTECTION DEVICE | January 2022 | February 2024 | Allow | 25 | 0 | 1 | No | No |
| 17648732 | SEMICONDUCTOR STRUCTURE | January 2022 | December 2022 | Allow | 11 | 1 | 1 | No | No |
| 17581557 | SWITCHING CELL WITH DIRECT CONTACT TO FIXED RESISTOR ELEMENT | January 2022 | April 2025 | Allow | 39 | 1 | 0 | No | No |
| 17577236 | Power Semiconductor Device Having Elevated Source Regions and Recessed Body Regions | January 2022 | September 2023 | Allow | 20 | 1 | 1 | No | No |
| 17570310 | OPTICAL FILTERS AND ASSOCIATED IMAGING DEVICES | January 2022 | March 2023 | Allow | 14 | 0 | 0 | No | No |
| 17569897 | FIELD EFFECT TRANSISTOR WITH VERTICAL NANOWIRE IN CHANNEL REGION AND BOTTOM SPACER BETWEEN THE VERTICAL NANOWIRE AND GATE DIELECTRIC MATERIAL | January 2022 | August 2024 | Allow | 32 | 1 | 1 | Yes | No |
| 17567696 | Semiconductor Memory Device | January 2022 | August 2024 | Allow | 31 | 1 | 1 | No | No |
| 17621486 | MANUFACTURING METHOD OF SEMICONDUCTOR SUPER-JUNCTION DEVICE | December 2021 | January 2024 | Allow | 25 | 0 | 0 | No | No |
| 17551686 | SELF-ALIGNED GATE CONTACT FOR VTFETS | December 2021 | July 2024 | Allow | 32 | 2 | 1 | Yes | No |
| 17550959 | DUAL SILICIDE WRAP-AROUND CONTACTS FOR SEMICONDUCTOR DEVICES | December 2021 | November 2024 | Abandon | 35 | 3 | 0 | No | No |
| 17545074 | Contact and Isolation in Monolithically Stacked VTFET | December 2021 | March 2024 | Allow | 27 | 1 | 1 | Yes | No |
| 17617276 | LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DEVICE INCLUDING A LIGHT-EMITTING LAYER CONTAINING QUANTUM DOTS | December 2021 | August 2024 | Allow | 32 | 1 | 0 | No | No |
| 17539431 | MANUFACTURING METHOD OF PILLAR-SHAPED SEMICONDUCTOR DEVICE | December 2021 | May 2024 | Allow | 60 | 1 | 1 | No | No |
| 17540224 | BONDED UNIFIED SEMICONDUCTOR CHIPS AND FABRICATION AND OPERATION METHODS THEREOF | December 2021 | November 2022 | Allow | 12 | 0 | 0 | No | No |
| 17456947 | WRAP-AROUND-CONTACT FOR 2D-CHANNEL GATE-ALL-AROUND FIELD-EFFECT-TRANSISTORS | November 2021 | December 2023 | Allow | 25 | 1 | 1 | Yes | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner HOQUE, MOHAMMAD M.
With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 26.1% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.
✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner HOQUE, MOHAMMAD M works in Art Unit 2817 and has examined 693 patent applications in our dataset. With an allowance rate of 85.0%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 22 months.
Examiner HOQUE, MOHAMMAD M's allowance rate of 85.0% places them in the 56% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.
On average, applications examined by HOQUE, MOHAMMAD M receive 1.74 office actions before reaching final disposition. This places the examiner in the 51% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.
The median time to disposition (half-life) for applications examined by HOQUE, MOHAMMAD M is 22 months. This places the examiner in the 81% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a +10.3% benefit to allowance rate for applications examined by HOQUE, MOHAMMAD M. This interview benefit is in the 47% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.
When applicants file an RCE with this examiner, 34.7% of applications are subsequently allowed. This success rate is in the 72% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 22.8% of cases where such amendments are filed. This entry rate is in the 22% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.
When applicants request a pre-appeal conference (PAC) with this examiner, 133.3% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 85% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.
This examiner withdraws rejections or reopens prosecution in 89.5% of appeals filed. This is in the 80% percentile among all examiners. Of these withdrawals, 76.5% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
When applicants file petitions regarding this examiner's actions, 51.9% are granted (fully or in part). This grant rate is in the 64% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.
Examiner's Amendments: This examiner makes examiner's amendments in 0.3% of allowed cases (in the 54% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 28% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.