USPTO Examiner DULKA JOHN P - Art Unit 2817

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19040693BONDING SYSTEM WITH SEALING GASKET AND METHOD FOR USING THE SAMEJanuary 2025October 2025Allow900NoNo
18962722LIDAR System and Manufacturing Method Having Semiconductor-Based Optical Components Coupled Together with SolderNovember 2024June 2025Allow710YesNo
187789773D SEMICONDUCTOR DEVICE AND STRUCTURE WITH THREE LEVELS AND ISOLATION LAYERSJuly 2024October 2025Allow1510YesNo
18679252SYSTEMS AND METHODS FOR SYSTEMATIC PHYSICAL FAILURE ANALYSIS (PFA) FAULT LOCALIZATIONMay 2024May 2025Allow1110NoNo
18629641ENCAPSULATED PACKAGE INCLUDING DEVICE DIES CONNECTED VIA INTERCONNECT DIEApril 2024February 2025Allow1010NoNo
18622867MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDINGMarch 2024January 2025Abandon1020NoNo
18604923ELECTRONIC APPARATUS WITH POLARIZATION PLATE AND MANUFACTURING METHOD THEREOFMarch 2024May 2025Allow1410YesNo
18432387MULTILAYER POWER, CONVERTER WITH DEVICES HAVING REDUCED LATERAL CURRENTFebruary 2024June 2025Allow1610NoNo
18402991INTEGRATED ALIGNED STEALTH LASER FOR WAFER EDGE TRIMMING PROCESSJanuary 2024August 2024Allow800NoNo
18401212SOLID STATE TRANSDUCER DIES HAVING REFLECTIVE FEATURES OVER CONTACTS AND ASSOCIATED SYSTEMS AND METHODSDecember 2023December 2024Allow1110NoNo
185344333D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A CONNECTIVE PATHDecember 2023May 2024Allow510NoNo
18515837SEMICONDUCTOR DEVICE INCLUDING LEAD WITH VARYING THICKNESSNovember 2023December 2024Allow1310NoNo
18510855SEMICONDUCTOR MEMORY STRUCTURE WITH L-SHAPED CHANNEL AND METHOD FOR MANUFACTURING THE SAMENovember 2023February 2026Allow2700NoNo
18388848MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDINGNovember 2023March 2024Allow410NoNo
18501354SEMICONDUCTOR DEVICE WITH ACTIVE PORTIONS OF VARIED WIDTHS INSIDE ACTIVE PATTERNNovember 2023February 2026Allow2700NoNo
18501396METAL-INSULATOR-METAL CAPACITORS WITH THICK INTERMEDIATE ELECTRODE LAYERS AND METHODS OF FORMING THE SAMENovember 2023July 2024Allow800NoNo
18484348EMBEDDED HIGH-Z MARKER MATERIAL AND PROCESS FOR ALIGNMENT OF MULTILEVEL EBEAM LITHOGRAPHYOctober 2023January 2025Allow1510NoNo
18370916METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH IMPURITY DOPED OXIDE SEMICONDUCTOR LAYERSeptember 2023November 2024Allow1410NoNo
18368355METHOD OF FORMING COPPER INTERCONNECT STRUCTURE WITH MANGANESE BARRIER LAYERSeptember 2023March 2026Allow3020NoNo
18452772PROCESSING METHOD OF WAFER REMOVING PERIPHERAL PORTION OF WAFERAugust 2023January 2026Allow2910YesNo
18452069ORGANIC COMPOUND, LIGHT ABSORPTION SENSOR, SENSOR-EMBEDDED DISPLAY PANEL, AND ELECTRONIC DEVICEAugust 2023October 2025Allow2600NoNo
18451354SUBSTRATE(S) FOR AN INTEGRATED CIRCUIT (IC) PACKAGE EMPLOYING A CORE LAYER AND AN ADJACENT INSULATION LAYER(S) WITH AN EMBEDDED METAL STRUCTURE(S) POSITIONED FROM THE CORE LAYERAugust 2023February 2026Allow3010NoNo
18233357SEMICONDUCTOR MEMORY DEVICE INCLUDING LOWER CONTACT PLUG PROTRUDING FROM SIDEWALL SPACERSAugust 2023January 2026Allow2910YesNo
18447332DISPLAY DEVICE WITH PERIPHERAL WIRING SUROUNDING SENSOR AREAAugust 2023March 2026Allow3110NoNo
18275020DISPLAY PANEL AND DISPLAY DEVICE WITH REDUCED CROSS-VOLTAGE BETWEEN SOURCE AND DRAINJuly 2023March 2026Allow3210NoNo
18361758GATED METAL-INSULATOR-SEMICONDUCTOR (MIS) TUNNEL DIODE HAVING NEGATIVE TRANSCONDUCTANCEJuly 2023July 2024Allow1100NoNo
18359383GRAPHENE BARRIER LAYER FOR REDUCED CONTACT RESISTANCEJuly 2023January 2025Allow1820NoNo
18222377METHOD FOR MANUFACTURING MONOCRYSTALLINE SILICON WAFER CONTAINING ARCED SIDE, METHOD FOR MANUFACTURING MONOCRYSTALLINE SILICON CELL, AND PHOTOVOLTAIC MODULEJuly 2023January 2025Allow1810NoNo
18218212SEMICONDUCTOR DEVICE WITH ETCHED LANDING PAD SURFACE AND MANUFACTURING METHOD THEREOFJuly 2023May 2025Allow2320NoNo
18344057GATE ALL AROUND STRUCTURE WITH ADDITIONAL SILICON LAYER AND METHOD FOR FORMING THE SAMEJune 2023June 2024Allow1100NoNo
18207357CIRCUIT BOARD ASSEMBLY WITH PHOTOSENSITIVE ELEMENT MOUNTED TO BACK SIDE OF CIRCUIT BOARDJune 2023July 2024Allow1300NoNo
18197505MEMORY DEVICE HAVING AN ARRAY OF VERTICAL TRANSISTORS WITH ASSOCIATED LINES AND METHOD FOR FORMING THE SAMEMay 2023February 2026Allow3310YesNo
18195512SEMICONDUCTOR DEVICE WITH VANADIUM-CONTAINING SPACERS AND METHOD FOR FABRICATING THE SAMEMay 2023February 2025Allow2120NoNo
18314126SEMICONDUCTOR STRUCTURE INCLUDING INTERCONNECTION TO PROBE PAD WITH PROBE MARKMay 2023September 2024Allow1710NoNo
18139414LASER LIGHT SOURCE AND A LASER CRYSTALLIZATION APPARATUS INCLUDING THE SAMEApril 2023June 2024Allow1400NoNo
18139275MULTI-DIE ULTRAFINE PITCH PATCH ARCHITECTURE OF INTERCONNECT BRIDGE OVER GLASS LAYER AND METHOD OF MAKINGApril 2023July 2024Allow1500NoNo
18135618METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING STATIONARY LASER MODULEApril 2023March 2025Allow2330YesNo
18299683SEMICONDUCTOR MEMORY DEVICE WITH BARRIER LAYERS BETWEEN GAP-FILL PATTERNS AND METHOD OF MANUFACTURING THE SAMEApril 2023February 2026Allow3420NoNo
18297946WAFER EDGE TRIMMING PROCESS INCLUDING WATER JET AND WEDGE SEPARATION AND METHODS THEREOFApril 2023October 2025Allow3000NoNo
18031084SUBSTRATE HOLDER WITH CENTRAL ELEVATION AND SUPPORT ELEVATIONS AND METHOD FOR PRODUCING A SUBSTRATE HOLDER FOR BONDING THEREOFApril 2023February 2026Allow3410NoNo
18030841PROCESS OF MAKING MONOLITHIC RGB MICRO LED DISPLAY USING DOWN CONVERTING MACROMOLECULESApril 2023February 2026Allow3410NoNo
18296389DATA STORAGE NODE VOLTAGE MONITOR CIRCUIT AND METHODS FOR FORMING THE SAMEApril 2023October 2025Allow3000NoNo
18129928HIGH ELECTRON MOBILITY TRANSISTOR STRUCTURE INCLUDING PASSIVATION CAPPING LAYER AND METHOD OF MANUFACTURING THE SAMEApril 2023October 2025Allow3000NoNo
18295225ADJACENT CELL ROUTING RESOURCE CONNECTIVITYApril 2023February 2026Allow3410NoNo
18194642SEMICONDUCTOR MEMORY DEVICES INCLUDING STEPWISE PROFILES AND METHODS OF FABRICATING THE SAMEApril 2023January 2026Allow3410YesNo
18193719DISPLAY DEVICE INCLUDING ORGANIC SENSOR LAYER WITH COLORANTMarch 2023February 2026Allow3410NoNo
18128327LIGHT-EMITTING DEVICE WITH CAVITY BETWEEN TOP ELECTRODE PAD AND PROTECTIVE LAYERMarch 2023October 2025Allow3000NoNo
18182456SEMICONDUCTOR MEMORY STRUCTURE WITH BUTTED CONTACT AND METHOD FOR MANUFACTURING SAMEMarch 2023November 2025Allow3311NoNo
18175557METHOD AND DEVICE FOR PROVIDING THROUGH-OPENINGS IN A SUBSTRATE AND A SUBSTRATE PRODUCED IN SAID MANNERFebruary 2023May 2025Allow2610NoNo
18163821SYSTEMS AND METHODS FOR SYSTEMATIC PHYSICAL FAILURE ANALYSIS (PFA) FAULT LOCALIZATIONFebruary 2023February 2024Allow1210NoNo
18159590OPTICAL HEATING DEVICE WITH ANGLED LIGHT HOLDING SUBSTRATE AND METHOD OF HEATING TREATMENT THEREOFJanuary 2023February 2026Allow3711NoNo
18155878Molded Laser Package with Electromagnetic Interference Shield and Method of MakingJanuary 2023February 2025Allow2520NoNo
18068064ENCAPSULATED PACKAGE INCLUDING DEVICE DIES CONNECTED VIA INTERCONNECT DIEDecember 2022January 2024Allow1310NoNo
180812073D MULTIPLE LOCATION COMPRESSING BONDED ARM FOR ADVANCED INTEGRATIONDecember 2022April 2025Allow2810NoNo
18080678INTERACTIVE ENVIRONMENT WITH VIRTUAL ENVIRONMENT SPACE SCANNINGDecember 2022August 2023Allow920NoNo
17927504Chip Fabrication Process for Improving LED Chip Light Extraction Efficiency with Isolation Groove and LED Chip ThereofNovember 2022September 2025Allow3410NoNo
17999492TRENCHED GATE DOUBLE DIFFUSED SEMICONDUCTOR DEVICE WITH CHANNEL IMPURITY CONCENTRATION ADJUSTMENT REGIONNovember 2022May 2025Allow3010NoNo
18054871INVERSION LAYER AVALANCHE PHOTODIODE WITH VERTICAL ELECTRIC FIELDNovember 2022January 2025Allow2600NoNo
17995171BONDED SUBSTRATE PERIPHERAL LASER PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS THEREOFSeptember 2022April 2025Allow3000NoNo
17885097WAFER SHAPE CONTROL FOR W2W BONDINGAugust 2022March 2025Allow3100NoNo
17818123SYSTEMS AND METHODS FOR PROCESSING SEMICONDUCTOR WAFERS USING FRONT-END PROCESSED WAFER GLOBAL GEOMETRY METRICSAugust 2022April 2025Allow3300NoNo
17880685METHOD OF FORMING PROTECTIVE LAYER UTILIZED IN SILICON REMOVE PROCESSAugust 2022January 2025Allow2910NoNo
17863493SEMICONDUCTOR DEVICE WITH ETCHED LANDING PAD SURFACEJuly 2022March 2025Allow3320NoNo
17855952SEMICONDUCTOR DEVICE WITH VANADIUM-CONTAINING SPACERS AND METHOD FOR FABRICATING THE SAMEJuly 2022February 2025Allow3110NoNo
17852424METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING UNDERLAYER FOR REDUCING DEFECT IN ARRAY REGIONJune 2022November 2025Allow4110NoNo
17851170SEMICONDUCTOR CHIP WITH FUSE STRUCTURE IN SCRIBE LANE AND METHOD OF FABRICATING THE SAMEJune 2022February 2025Allow3110YesNo
17788776SUBSTRATE LASER PROCESSING METHOD AND SUBSTRATE LASER PROCESSING APPARATUSJune 2022January 2025Allow3110NoNo
17827876OPTICAL HEATING APPARATUS WITH ANGLED LIGHT HOLDING SUBSTRATE AND HEATING TREATMENT METHOD THEREOFMay 2022January 2025Allow3220NoNo
17826805SEMICONDUCTOR MANUFACTURING APPARATUS INCLUDING TEMPERATURE SENSOR INSIDE GAS PIPE AND TEMPERATURE CONTROL METHOD THEREOFMay 2022August 2025Allow3810NoNo
17750452SEMICONDUCTOR DEVICE WITH LIGHT TRANSMITTANCE ADJUSTMENT PLATE AND PROCESSING METHOD THEREFOR, AND METHOD FOR MEASURING TEMPERATUREMay 2022June 2025Allow3700YesNo
17778476APPARATUS WITH DEFORMABLE HEATER AND METHOD FOR HEATING A SUBSTRATE THEREOFMay 2022October 2025Allow4110NoNo
17663488REINFORCEMENT PORTION PROCESSING APPARATUSMay 2022August 2025Allow3910NoNo
17742447NON-CONTACT PROCESSING DEVICE AND PROCESSING METHOD INCLUDING MODIFICATION ENERGY AND SEPARATION ENERGYMay 2022January 2026Allow4410NoNo
17661377FLOORING EDGE TOOLSApril 2022May 2025Allow3601YesNo
17772166MANUFACTURING METHOD OF CHIP-ATTACHED SUBSTRATE AND SUBSTRATE PROCESSING APPARATUSApril 2022October 2025Allow4110NoNo
17720282WAFER PROCESSING APPARATUS INCLUDING ROTATABLE ELEMENT CONNECTED TO PRESSURE APPLYING ELEMENTApril 2022October 2025Allow4210NoNo
17708579COOKTOP APPLIANCE AND DUAL WIRE SENSOR ASSEMBLYMarch 2022June 2025Allow3900NoNo
17754354PLASMA DEVICE ACTIVATION WITHIN A PREDETERMINED DISTANCEMarch 2022August 2025Allow4110NoNo
17708281SEMICONDUCTOR STRUCTURE WITH INTERCONNECTS AND METHOD FOR PREPARING SAMEMarch 2022March 2025Allow3520NoNo
17763454REFLOW SOLDERING MACHINE FOR CONTINUOUSLY SOLDERING OF SOLDERING GOODSMarch 2022July 2025Allow3900NoNo
17703419ELECTRODE-EMBEDDED MEMBER WITH PIN-SHAPED PROJECTIONS OF VARYING HEIGHTS, SUBSTRATE HOLDING MEMBER, CERAMIC HEATER, AND ELECTROSTATIC CHUCKMarch 2022January 2026Allow4620NoNo
17701088THIN WAFER PROCESS FOR IMPROVED CRYSTAL UTILIZATION OF WIDE BANDGAP DEVICESMarch 2022March 2025Allow3600NoNo
17651858Transistors with Stacked Semiconductor Layers as ChannelsFebruary 2022April 2025Allow3800NoNo
17675398POWDER SUPPLY ASSEMBLY INCLUDING MULTIPLE CONTAINER REGIONS AND FLOW CONTROL IN AN ADDITIVE MANUFACTURING SYSTEMFebruary 2022March 2026Allow4910NoNo
17636266WAFER OPTICAL PROCESSING DEVICE AND SINTERING FURNACEFebruary 2022April 2025Allow3810NoNo
17634801INTERMEDIATE HEATING STATION WITH SUPPORT PROJECTIONS ON LOWER MASKFebruary 2022June 2025Allow4010NoNo
17591926COOKING APPLIANCE WITH RESIDUAL HEAT INDICATOR ASSEMBLYFebruary 2022July 2025Allow4100NoNo
17570675BURIED NEAR-GATE LOCAL INTERCONNECTS AND METHODS OF THEIR MANUFACTUREJanuary 2022February 2026Allow5011NoNo
17569892INDUCTION HEATING APPARATUS AND METHOD FOR CONTROLLING THE SAMEJanuary 2022March 2025Allow3800NoNo
17567136HEAT SHIELD WITH COIL RECESS FOR INDUCTION WELDINGJanuary 2022December 2024Allow3500NoNo
17564421TOWEL WARMING ASSEMBLY INCLUDING FRAGRANCE DOORDecember 2021June 2025Allow4210NoNo
17621079LASER WELDING CONTROL FEEDBACK METHOD, APPARATUS AND SYSTEM, AND ELECTRONIC DEVICEDecember 2021April 2025Allow4010NoNo
17620211FLUX-CORED WIRE AND WELDING METHODDecember 2021January 2025Allow3700NoNo
17552680DEVICE WITH DIELECTRIC METAL OXIDE LAYERS AND SEMICONDUCTOR APPARATUS INCLUDING THE SAMEDecember 2021May 2025Allow4120YesNo
17643073SEMICONDUCTOR MANUFACTURING METHOD AND MANUFACTURING DEVICE OF EDGE LASER REMOVAL OF COMBINED SUBSTRATEDecember 2021March 2024Allow2710NoNo
17596163Welding Work Measurement SystemDecember 2021May 2025Allow4210NoNo
17541166LASER WELDING DEVICE WITH CHANGING FOCAL POSITION AND LASER WELDING METHOD USING SAMEDecember 2021January 2025Allow3710NoNo
17595764LASER PROCESSING SYSTEM USING BESSEL BEAM AND METHOD FOR PROCESSING WORKPIECE USING BESSEL BEAMNovember 2021March 2025Allow4010NoNo
17532719CONNECTOR AND LASER ENGRAVING LABEL FORMING METHOD THEREOFNovember 2021February 2025Allow3810NoNo
17530729TOUCH-START WELDING METHOD BETWEEN COILS OF DIFFERENT HEIGHT AND DEVICE THEREOFNovember 2021March 2025Allow4010YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner DULKA, JOHN P.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
10.9%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
4
Allowed After Appeal Filing
1
(25.0%)
Not Allowed After Appeal Filing
3
(75.0%)
Filing Benefit Percentile
35.2%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 25.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner DULKA, JOHN P - Prosecution Strategy Guide

Executive Summary

Examiner DULKA, JOHN P works in Art Unit 2817 and has examined 149 patent applications in our dataset. With an allowance rate of 99.3%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 38 months.

Allowance Patterns

Examiner DULKA, JOHN P's allowance rate of 99.3% places them in the 93% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by DULKA, JOHN P receive 1.95 office actions before reaching final disposition. This places the examiner in the 48% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by DULKA, JOHN P is 38 months. This places the examiner in the 30% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.9% benefit to allowance rate for applications examined by DULKA, JOHN P. This interview benefit is in the 19% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.0% of applications are subsequently allowed. This success rate is in the 78% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 49.2% of cases where such amendments are filed. This entry rate is in the 74% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 13% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 80.0% of appeals filed. This is in the 72% percentile among all examiners. Of these withdrawals, 75.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 83.3% are granted (fully or in part). This grant rate is in the 86% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 8.7% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.