USPTO Examiner CHANG JAY C - Art Unit 2817

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19064511QUAD FLAT NO-LEAD (QFN) PACKAGE WITH TIE BARS AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAMEFebruary 2025September 2025Allow620NoNo
18629215Methods for Manufacturing a Semiconductor Package and a Semiconductor ModuleApril 2024September 2025Allow1710NoNo
18616275CHIP PACKAGING METHOD AND CHIP PACKAGE UNITMarch 2024October 2025Allow1910NoNo
18615509DISPLAY SUBSTRATE AND DISPLAY DEVICEMarch 2024September 2025Allow1810YesNo
18592523SEMICONDUCTOR STRUCTUREMarch 2024September 2025Allow1910NoNo
18427769SYSTEM AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE STRUCTUREJanuary 2024November 2025Allow2110NoNo
18418318METHOD FOR FABRICATING DEVICE DIEJanuary 2024November 2025Allow2211YesNo
18413020Method of Forming Packages of Stacked ChipsJanuary 2024March 2025Allow1410NoNo
18405312Pixel configurations for high resolution OVJP printed OLED displaysJanuary 2024November 2025Allow2320YesNo
18389741ENCAPSULANT-DEFINED LAND GRID ARRAY (LGA) PACKAGE AND METHOD FOR MAKING THE SAMEDecember 2023September 2025Allow2131YesNo
18543992Double-Sided Partial Molded SiP ModuleDecember 2023June 2025Allow1810YesNo
18526643SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFDecember 2023September 2025Allow2210NoNo
18522259PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAMENovember 2023October 2025Allow2311YesNo
18518456PACKAGE STRUCTURENovember 2023October 2025Allow2311NoNo
18515078Chip-Last Wafer-Level Fan-Out with Optical Fiber Alignment StructureNovember 2023September 2025Allow2130YesNo
18389264EMBEDDED CHIP PACKAGE AND MANUFACTURING METHOD THEREOFNovember 2023October 2024Allow1110NoNo
18507328HIGH DENSITY CARBON FILMS FOR PATTERNING APPLICATIONSNovember 2023July 2025Allow2010NoNo
18504745CONTACT PLUGS AND METHODS FORMING SAMENovember 2023July 2025Allow2020NoNo
18494198COATED SEMICONDUCTOR DIESOctober 2023September 2025Allow2321YesNo
18379368FIELD STOP IGBT WITH GROWN INJECTION REGIONOctober 2023February 2025Allow1611YesNo
18367285INORGANIC-BASED EMBEDDED-DIE LAYERS FOR MODULAR SEMICONDUCTIVE DEVICESSeptember 2023January 2025Allow1611YesNo
18464409CONDUIT INSERTS FOR ENCAPSULANT COMPOUND FORMULATION KNEADING AND ENCAPSULATION BACK-END ASSEMBLY PROCESSESSeptember 2023June 2025Allow2111YesNo
18462414CHIP PACKAGE AND MANUFACTURING METHOD THEREOFSeptember 2023April 2025Allow1911YesNo
18237115CARRIER FILM DISPOSED ON A MOTHER SUBSTRATE AND METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGEAugust 2023October 2024Allow1411YesNo
18447428Semiconductor Package and Method of Forming ThereofAugust 2023June 2025Allow2220NoNo
18361300PACKAGES WITH ENLARGED THROUGH-VIAS IN ENCAPSULANTJuly 2023June 2025Allow2220NoNo
18333460CHIP INTEGRATION INTO CAVITIES OF A HOST WAFER USING LATERAL DIELECTRIC MATERIAL BONDINGJune 2023February 2025Allow2020NoNo
18333449CHIP INTEGRATION INTO CAVITIES OF A HOST WAFER USING LATERAL DIELECTRIC MATERIAL BONDINGJune 2023September 2024Allow1510YesNo
18141568SEMICONDUCTOR PACKAGE AND ANTENNA MODULE COMPRISING THE SAMEMay 2023July 2024Allow1410NoNo
18132295PACKAGING STRUCTURE AND PACKAGING METHODApril 2023December 2025Allow3211YesNo
18193894Semiconductor Device and Method of Forming High Crystal Quality Magnetic Layer for Shielding of Low Frequency Magnetic FieldsMarch 2023February 2026Allow3511NoNo
18127717HIGHLY INTEGRATED POWER ELECTRONICS AND METHODS OF MANUFACTURING THE SAMEMarch 2023November 2025Allow3110NoNo
18122776Subtractive Metal Structuring on Surface of Semiconductor PackageMarch 2023March 2026Allow3621NoNo
18121569SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEMarch 2023July 2024Allow1610NoNo
18121145METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING APPARATUS AND SEMICONDUCTOR DEVICEMarch 2023June 2024Allow1510NoNo
18115359HIGHLY INTEGRATED POWER ELECTRONICS AND METHODS OF MANUFACTURING THE SAMEFebruary 2023October 2025Allow3210NoNo
18115545SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGEFebruary 2023October 2025Allow3210YesNo
18114119CONTACTS FOR SOLAR CELLSFebruary 2023October 2024Allow2020NoNo
18110219PACKAGE LID WITH A VAPOR CHAMBER BASE HAVING AN ANGLED PORTION AND METHODS FOR FORMING THE SAMEFebruary 2023December 2025Allow3411NoNo
18109266ANTENNA PACKAGEFebruary 2023February 2026Allow3621NoNo
18166122SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEFebruary 2023November 2025Allow3311NoNo
18165896MANUFACTURING METHOD OF THE SEMICONDUCTOR PACKAGE, PICK AND PLACE DEVICE, AND WORKPIECE HANDLING APPARATUSFebruary 2023March 2026Allow3711YesNo
18165545SEMICONDUCTOR PACKAGES WITH WETTABLE FLANKS AND RELATED METHODSFebruary 2023October 2025Allow3210YesNo
18165921PACKAGE STRUCTUREFebruary 2023November 2025Allow3310YesNo
18105801Method of Multi-layer Die Stacking with Die-to-Wafer BondingFebruary 2023March 2026Allow3711NoNo
18104817METAL OXIDE AND FIELD-EFFECT TRANSISTORFebruary 2023March 2025Allow2530NoNo
18162715PACKAGE STRUCTURE AND METHOD OF FORMING THE SAMEFebruary 2023December 2025Allow3411NoNo
18154638MANUFACTURING OF ELECTRONIC COMPONENTSJanuary 2023January 2026Allow3611YesNo
18154024SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAMEJanuary 2023December 2025Allow3611YesNo
18152761PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFJanuary 2023January 2026Allow3611NoNo
18090317MULTI-TOOL AND MULTI-DIRECTIONAL PACKAGE SINGULATIONDecember 2022December 2025Allow3511NoNo
18002573CHIP EMBEDDED COMPOSITE FOR ELECTRON BEAM LITHOGRAPHY, PREPARATION METHOD AND APPLICATION THEREOFDecember 2022November 2025Allow3511YesNo
18080640SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAMEDecember 2022July 2024Allow1910NoNo
18063466SYSTEMS AND METHODS FOR QUANTUM BASED OPTIMIZATION OF A PERSONALIZED PORTFOLIODecember 2022November 2024Allow2310YesNo
18063449SYSTEMS AND METHODS FOR QUANTUM BASED OPTIMIZATION OF A PERSONALIZED PORTFOLIODecember 2022October 2024Allow2210YesNo
17981939NOISE REDUCED CIRCUITS FOR SUPERCONDUCTING QUANTUM COMPUTERSNovember 2022May 2024Allow1810YesNo
17973864Semiconductor Package with Lead Tip Inspection FeatureOctober 2022December 2024Abandon2620NoNo
17934483SEMICONDUCTOR ELEMENT BONDING SUBSTRATE, SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICESeptember 2022August 2025Allow3541YesYes
17818722ELECTRIC DEVICE, ITS CIRCUIT BOARD AND METHOD OF MANUFACTURING THE ELECTRIC DEVICEAugust 2022July 2025Allow3511NoNo
17884037Semiconductor Package and Method of Manufacturing The SameAugust 2022November 2024Allow2720NoNo
17818625Semiconductor Device and MethodAugust 2022July 2024Allow2411NoNo
17882327ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICESAugust 2022November 2025Allow3921NoNo
17882239Semiconductor Device and Method of ManufactureAugust 2022September 2024Allow2520NoNo
17881274TECHNIQUES FOR FORMING SELF-ALIGNED MEMORY STRUCTURESAugust 2022October 2024Allow2620YesNo
17817481Antenna in Embedded Wafer-Level Ball-Grid Array PackageAugust 2022June 2024Allow2241NoNo
17874782Integrated Circuit Package and MethodJuly 2022May 2025Allow3321YesNo
17814997SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF FORMATIONJuly 2022July 2025Allow3611YesNo
17813906SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTUREJuly 2022May 2024Allow2210NoNo
17812339Semiconductor Device and Method of Forming EMI Shielding Material in Two-Step Process to Avoid Contaminating Electrical ConnectorJuly 2022July 2025Allow3621YesNo
17862343LIGHT EMITTING DEVICE FOR DISPLAY AND DISPLAY APPARATUSJuly 2022October 2025Allow4020NoNo
17859834Method of Forming Semiconductor DeviceJuly 2022July 2024Allow2420NoNo
17853953PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAMEJune 2022June 2024Allow2411YesNo
17853894PACKAGE, PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAMEJune 2022September 2025Allow3811NoNo
17849138SEMICONDUCTOR PACKAGEJune 2022April 2024Allow2110YesNo
17829119SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEMay 2022March 2024Allow2210NoNo
17735471METHODS OF FABRICATING SEMICONDUCTOR PACKAGEMay 2022March 2024Allow2330YesNo
17717153THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORMING THE SAMEApril 2022October 2024Allow3021YesNo
17682994SEMICONDUCTOR DEVICEFebruary 2022January 2025Allow3511NoNo
17638845DISPLAY PANEL AND PREPARATION METHOD THEREFOR, AND DISPLAY DEVICEFebruary 2022September 2025Allow4231NoNo
17583038GRINDABLE HEAT SINK FOR MULTIPLE DIE PACKAGINGJanuary 2022January 2025Allow3611NoNo
17575660SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022July 2025Allow4351YesNo
17574192FIDELITY ESTIMATION FOR QUANTUM COMPUTING SYSTEMSJanuary 2022August 2024Allow3120NoNo
17566573ELECTRONIC PACKAGEDecember 2021July 2024Allow3110NoNo
17623301SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEDecember 2021November 2024Allow3411YesNo
17623278DISPLAY PANELDecember 2021July 2024Allow3110NoNo
17622859DISPLAY PANEL, METHOD FOR MANUFACTURING SAME, AND DISPLAY TERMINALDecember 2021March 2025Allow3820YesNo
17559363DIRECTED SELF-ASSEMBLY ENABLED SUBTRACTIVE METAL PATTERNINGDecember 2021January 2025Allow3721NoNo
17559482DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEDecember 2021April 2025Allow4021YesNo
17559462DISPLAY DEVICE AND MANUFACTURING METHOD THEREOFDecember 2021July 2025Allow4331YesNo
17559443DISPLAY DEVICEDecember 2021February 2025Allow3721YesNo
17551185MICRO LIGHT EMITTING DIODE DISPLAY DEVICEDecember 2021June 2024Allow3010NoNo
17550689TRANSPARENT DISPLAY DEVICEDecember 2021September 2024Allow3320YesNo
17536280SEMICONDUCTOR DEVICE WITH BUFFER LAYER AND METHOD OF FORMINGNovember 2021September 2024Allow3320NoNo
17535984Chip Package Including Stacked Chips and Chip CouplersNovember 2021December 2023Allow2521YesNo
17613691DISPLAY PANEL, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICENovember 2021May 2025Allow4230NoNo
17532030METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING FRAME STRUCTURES LATERALLY SURROUNDING BACKSIDE METAL STRUCTURESNovember 2021January 2024Allow2630YesNo
17612316METHOD FOR MANUFACTURING ELECTRONIC COMPONENT DEVICE, AND ELECTRONIC COMPONENT DEVICENovember 2021October 2024Allow3511NoNo
17526966CHIP PACKAGING APPARATUS AND PREPARATION METHOD THEREOFNovember 2021December 2025Allow4941YesNo
17454742FAN-OUT SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAMENovember 2021September 2024Allow3421NoNo
17492493SEMICONDUCTOR PACKAGE SHIELDING STRUCTUREOctober 2021January 2024Allow2810YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner CHANG, JAY C.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
0
(0.0%)
Examiner Reversed
1
(100.0%)
Reversal Percentile
94.8%
Higher than average

What This Means

With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
1
(100.0%)
Not Allowed After Appeal Filing
0
(0.0%)
Filing Benefit Percentile
97.5%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 100.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner CHANG, JAY C - Prosecution Strategy Guide

Executive Summary

Examiner CHANG, JAY C works in Art Unit 2817 and has examined 70 patent applications in our dataset. With an allowance rate of 97.1%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 30 months.

Allowance Patterns

Examiner CHANG, JAY C's allowance rate of 97.1% places them in the 88% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by CHANG, JAY C receive 1.99 office actions before reaching final disposition. This places the examiner in the 50% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by CHANG, JAY C is 30 months. This places the examiner in the 60% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -0.5% benefit to allowance rate for applications examined by CHANG, JAY C. This interview benefit is in the 11% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 32.8% of applications are subsequently allowed. This success rate is in the 70% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 46.9% of cases where such amendments are filed. This entry rate is in the 71% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 13% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 18% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 57.1% are granted (fully or in part). This grant rate is in the 60% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

    Relevant MPEP Sections for Prosecution Strategy

    • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
    • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
    • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
    • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
    • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
    • MPEP § 1214.07: Reopening prosecution after appeal

    Important Disclaimer

    Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

    No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

    Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

    Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.