USPTO Examiner FLECK LINDA JOAN - Art Unit 2812

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18741123SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJune 2024October 2025Allow1610NoNo
18171179SEMICONDUCTOR STRUCTURE AND ELECTROSTATIC DISCHARGE PROTECTION DEVICEFebruary 2023September 2025Allow3110NoNo
17998431HIGH-DENSITY THREE-DIMENSIONAL MULTILAYER MEMORY AND FABRICATION METHODNovember 2022January 2026Allow3820NoNo
17902212LIGHT EMITTING PANEL USEFUL FOR DISPLAY DEVICE WITH PHOTOELECTRIC CONVERSION UNIT BETWEEN TWO ADJACENT FIRST PROJECTIONSSeptember 2022January 2026Allow4110YesNo
17885955SEMICONDUCTOR DEVICE INCLUDING SEPARATED ELECTRODE PADS AND METHOD OF MANUFACTURING THE SAMEAugust 2022February 2026Allow4220YesNo
17882788CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING THE CAPACITORAugust 2022February 2026Allow4320YesNo
17781894SEMICONDUCTOR MODULEJune 2022December 2025Allow4320NoNo
17750454CIRCUIT MODULEMay 2022October 2025Allow4110NoNo
17720276FIELD EFFECT TRANSISTOR WITH DUAL SILICIDE AND METHODApril 2022November 2025Allow4321NoNo
17712776Memory Circuitry Comprising Strings Of Memory CellsApril 2022December 2025Allow4510NoNo
17764616DISPLAY PANEL AND DISPLAY DEVICEMarch 2022September 2025Allow4210NoNo
17705388FLEXIBLE SUBSTRATEMarch 2022July 2025Allow4020YesNo
17654264SEMICONDUCTOR DEVICEMarch 2022February 2025Allow3610NoNo
17691814LIGHT EMITTING ELEMENTMarch 2022July 2025Allow4010YesNo
17677681INSPECTION METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INSPECTION APPARATUS, INSPECTION SYSTEM, AND STORAGE MEDIUMFebruary 2022October 2025Abandon4410NoNo
17634706LIGHT-EMITTING ELEMENTFebruary 2022June 2025Abandon4011NoNo
17578448NON-VOLATILE MEMORY DEVICE HAVING PN DIODEJanuary 2022July 2025Allow4220YesNo
17622239THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY PANELDecember 2021December 2025Allow4740NoNo
16603439DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAMEDecember 2021January 2025Allow6020NoNo
17552231SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEDecember 2021January 2025Abandon3710NoNo
17643924ETCHING METHOD AND ETCHING APPARATUSDecember 2021August 2025Allow4421NoNo
17643274ELECTROSTATIC DISCHARGE PROTECTION DEVICEDecember 2021September 2024Allow3310NoNo
17456381SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS HAVING A HYDROGEN INCREASING PORTIONNovember 2021February 2026Allow5141YesNo
17455694METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND MEMORY, AND SEMICONDUCTOR STRUCTURENovember 2021February 2025Abandon3911NoNo
17531060SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICENovember 2021July 2025Allow4421NoNo
17454674METHOD OF ETCHING A SEMICONDUCTOR DEVICE BY ETCHING INITIAL MASK STRUCTURES AT A REGION HAVING AN EXTENSION DIRECTION DIFFERENT FROM THE EXTENSION DIRECTION OF THE INITIAL MASK STRUCTURESNovember 2021January 2026Allow5031YesNo
17518862SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICENovember 2021October 2024Allow3511YesNo
17603294HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND METHOD OF MANUFACTURING THE SAMEOctober 2021July 2025Allow4530YesNo
16603436HIGH SCREEN RATIO ORGANIC LIGHT EMITTING DIODE DISPLAY PANELOctober 2021September 2024Allow5910NoNo
17493923IMAGING DEVICEOctober 2021September 2024Allow3510NoNo
17442291METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURESeptember 2021November 2024Abandon3810NoNo
17476738METHOD FOR FORMING SELF-ALIGNED DOUBLE PATTERN AND SEMICONDUCTOR STRUCTURESSeptember 2021August 2024Allow3501NoNo
17437439SEMICONDUCTOR DEVICESeptember 2021April 2025Allow4330NoNo
17459818INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS AND BACKSIDE POWER NODESAugust 2021October 2024Allow3701NoNo
17393847REPLACEMENT BOTTOM ELECTRODE STRUCTURE FOR MRAM DEVICESAugust 2021August 2024Allow3620NoNo
17393781THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICEAugust 2021July 2024Allow3521YesNo
17390151PLASMA TREATMENT PROCESS TO DENSIFY OXIDE LAYERSJuly 2021June 2024Allow3410YesNo
17444075SEMICONDUCTOR MEMORY DEVICEJuly 2021May 2025Abandon4621NoNo
17443448NONVOLATILE MEMORY CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAMEJuly 2021September 2024Allow3820YesNo
17377840THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAMEJuly 2021October 2024Allow3911YesNo
17361218SENSING DEVICEJune 2021September 2024Allow3820YesNo
17353505SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJune 2021July 2024Allow3711NoNo
17352952DEVICE, METHOD, AND SYSTEM TO PROVIDE PASSIVATION STRUCTURES OF A MAGNETIC MATERIAL BASED INDUCTORJune 2021October 2025Allow5220NoNo
17349653IN-PACKAGE MAGNETIC SWITCHING USING GLASS CORE TECHNOLOGYJune 2021December 2025Allow5420NoNo
17129875INTEGRATED CIRCUIT DEVICE HAVING BACKEND DOUBLE-WALLED CAPACITORSDecember 2020January 2025Abandon4920YesNo
17118367TIER ARCHITECTURE FOR 3-DIMENSIONAL CROSS POINT MEMORYDecember 2020August 2025Abandon5621NoNo
17105416FRAME REVEALS WITH MASKLESS LITHOGRAPHY IN THE MANUFACTURE OF INTEGRATED CIRCUITSNovember 2020August 2024Allow4411NoNo

Appeals Overview

No appeal data available for this record. This may indicate that no appeals have been filed or decided for applications in this dataset.

Examiner FLECK, LINDA JOAN - Prosecution Strategy Guide

Executive Summary

Examiner FLECK, LINDA JOAN works in Art Unit 2812 and has examined 30 patent applications in our dataset. With an allowance rate of 80.0%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 43 months.

Allowance Patterns

Examiner FLECK, LINDA JOAN's allowance rate of 80.0% places them in the 50% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by FLECK, LINDA JOAN receive 1.73 office actions before reaching final disposition. This places the examiner in the 37% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by FLECK, LINDA JOAN is 43 months. This places the examiner in the 17% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.

Interview Effectiveness

Conducting an examiner interview provides a +15.0% benefit to allowance rate for applications examined by FLECK, LINDA JOAN. This interview benefit is in the 54% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 33.3% of applications are subsequently allowed. This success rate is in the 72% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 45.5% of cases where such amendments are filed. This entry rate is in the 69% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Petition Practice

When applicants file petitions regarding this examiner's actions, 66.7% are granted (fully or in part). This grant rate is in the 73% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 8.3% of allowed cases (in the 87% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Plan for extended prosecution: Applications take longer than average with this examiner. Factor this into your continuation strategy and client communications.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.