Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 17137699 | MEMORY DEVICE AND TEST OPERATION THEREOF | December 2020 | October 2022 | Allow | 21 | 1 | 0 | No | No |
| 16973142 | SERIALIZING AND DESERIALIZING STAGE TESTING | December 2020 | March 2022 | Allow | 15 | 1 | 0 | No | No |
| 16973029 | METHODS FOR DATA RECOVERY OF A DISTRIBUTED STORAGE SYSTEM AND STORAGE MEDIUM THEREOF | December 2020 | September 2022 | Allow | 22 | 2 | 0 | Yes | No |
| 17109144 | FAILURE MODE ANALYSIS METHOD FOR MEMORY DEVICE | December 2020 | July 2022 | Allow | 19 | 1 | 0 | No | No |
| 17033043 | ENDURANCE AND SERVICEABILITY IN SOLID STATE DRIVES | September 2020 | August 2024 | Allow | 46 | 2 | 0 | Yes | No |
| 17031066 | EFFICIENT ENCODING FOR NON-BINARY ERROR CORRECTION CODES | September 2020 | June 2022 | Allow | 21 | 2 | 0 | No | No |
| 17013089 | SELECTIVE INHIBITION OF MEMORY | September 2020 | October 2022 | Allow | 26 | 1 | 0 | Yes | No |
| 17005808 | MITIGATING SINGLE-EVENT UPSETS USING CONTAINERIZATION | August 2020 | February 2022 | Allow | 17 | 1 | 0 | Yes | No |
| 16985509 | STORAGE CIRCUIT WITH HARDWARE READ ACCESS | August 2020 | July 2023 | Allow | 36 | 2 | 0 | Yes | No |
| 16924620 | Memory device test circuit and memory device test method | July 2020 | June 2022 | Allow | 23 | 1 | 0 | No | No |
| 16960639 | TRANSMISSION METHOD AND RECEPTION DEVICE | July 2020 | August 2022 | Allow | 25 | 1 | 1 | Yes | No |
| 16919019 | DETECTING AND REMEDIATING UNAUTHORIZED DEBUG SESSIONS | July 2020 | June 2023 | Allow | 35 | 2 | 0 | No | No |
| 16869492 | READ SOFT BITS THROUGH BOOSTED MODULATION FOLLOWING READING HARD BITS | May 2020 | September 2022 | Allow | 28 | 1 | 0 | No | No |
| 16757945 | TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD | April 2020 | June 2022 | Allow | 26 | 2 | 1 | Yes | No |
| 16803295 | EFFICIENT RESOURCE SHARING | February 2020 | March 2022 | Allow | 24 | 1 | 0 | No | No |
| 16795119 | UNDO AND REDO OF SOFT POST PACKAGE REPAIR | February 2020 | September 2023 | Allow | 43 | 1 | 0 | Yes | No |
| 16742292 | CIRCUIT AND METHOD FOR AT SPEED DETECTION OF A WORD LINE FAULT CONDITION IN A MEMORY CIRCUIT | January 2020 | August 2022 | Allow | 31 | 2 | 0 | No | No |
| 16741017 | REFRESH-HIDING MEMORY SYSTEM STAGGERED REFRESH | January 2020 | September 2022 | Allow | 32 | 3 | 0 | Yes | No |
| 16732603 | RANDOM NOISE GENERATION | January 2020 | September 2022 | Allow | 32 | 1 | 0 | Yes | No |
| 16721887 | Data Storage Devices, Access Device and Data Processing Methods | December 2019 | March 2022 | Allow | 27 | 1 | 0 | No | No |
| 16705038 | BUILT-IN SELF-TESTING AND FAILURE CORRECTION CIRCUITRY | December 2019 | August 2021 | Allow | 20 | 0 | 0 | No | No |
| 16682925 | METHOD AND SYSTEM FOR REAL TIME OUTLIER DETECTION AND PRODUCT RE-BINNING | November 2019 | March 2022 | Allow | 28 | 1 | 0 | Yes | No |
| 16681587 | MULTI-LEVEL SIGNALING FOR A MEMORY DEVICE | November 2019 | April 2022 | Allow | 29 | 2 | 0 | No | No |
| 16679292 | MEMORY DEVICE AND MULTI PHYSICAL CELLS ERROR CORRECTION METHOD THEREOF | November 2019 | February 2022 | Allow | 27 | 3 | 0 | Yes | No |
| 16612681 | CYCLIC REDUNDANCY CHECK CIRCUIT AND METHOD AND APPARATUS THEREOF, CHIP AND ELECTRONIC DEVICE | November 2019 | March 2022 | Allow | 28 | 2 | 0 | No | No |
| 16673684 | ERROR CORRECTION CIRCUIT AND MEMORY CONTROLLER HAVING THE SAME | November 2019 | January 2022 | Allow | 26 | 2 | 0 | Yes | No |
| 16610728 | Adaptive Selection and Efficient Storage of Information Bit Locations for Polar Codes | November 2019 | March 2022 | Allow | 28 | 2 | 0 | Yes | No |
| 16583682 | MONITORING OF TRIPLE REDUNDANT CIRCULAR DATA | September 2019 | August 2021 | Abandon | 22 | 2 | 0 | No | No |
| 16583639 | METHOD AND APPARATUS FOR TESTING A MULTI-DIE INTEGRATED CIRCUIT DEVICE | September 2019 | June 2021 | Allow | 21 | 1 | 0 | Yes | No |
| 16490293 | Generalized Polar Codes | August 2019 | January 2022 | Allow | 29 | 2 | 0 | No | No |
| 16556981 | SCRUB MANAGEMENT IN STORAGE CLASS MEMORY | August 2019 | June 2021 | Allow | 22 | 1 | 0 | No | No |
| 16556917 | RELIABILITY EVALUATION APPARATUS | August 2019 | July 2021 | Allow | 23 | 2 | 0 | No | No |
| 16544055 | NON-SEQUENTIAL PAGE CONTINUOUS READ | August 2019 | February 2021 | Allow | 18 | 1 | 0 | Yes | No |
| 16538020 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE | August 2019 | February 2021 | Abandon | 18 | 1 | 0 | No | No |
| 16537620 | MEMORY STORAGE APPARATUS AND DATA ACCESS METHOD | August 2019 | December 2021 | Allow | 29 | 2 | 0 | Yes | No |
| 16534560 | SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SELF-DIAGNOSIS | August 2019 | October 2021 | Allow | 26 | 2 | 0 | Yes | No |
| 16533463 | FAST PAGE CONTINUOUS READ | August 2019 | January 2021 | Allow | 17 | 1 | 0 | No | No |
| 16527653 | WIRELESS COMMUNICATION SYSTEM, BASE STATION DEVICE, TERMINAL DEVICE, AND WIRELESS COMMUNICATION METHOD | July 2019 | February 2021 | Abandon | 18 | 1 | 0 | No | No |
| 16510735 | DECISION FOR EXECUTING FULL-MEMORY REFRESH DURING MEMORY SUB-SYSTEM POWER-ON STAGE | July 2019 | March 2022 | Allow | 32 | 3 | 0 | Yes | No |
| 16510483 | SELF-ADAPTIVE READ VOLTAGE ADJUSTMENT USING BOUNDARY ERROR STATISTICS FOR MEMORIES WITH TIME-VARYING ERROR RATES | July 2019 | April 2021 | Allow | 21 | 1 | 0 | Yes | No |
| 16510318 | MEMORY SYSTEM WITH LOW-COMPLEXITY DECODING AND METHOD OF OPERATING SUCH MEMORY SYSTEM | July 2019 | February 2022 | Allow | 31 | 3 | 0 | No | No |
| 16508951 | MEMORY SYSTEM AND OPERATING METHOD THEREOF | July 2019 | December 2021 | Allow | 29 | 4 | 0 | Yes | No |
| 16506809 | STORAGE DEVICE USING BUFFER MEMORY IN READ RECLAIM OPERATION | July 2019 | December 2021 | Allow | 29 | 3 | 0 | Yes | No |
| 16502690 | TECHNIQUES FOR IMPROVED ERASURE CODING IN DISTRIBUTED STORAGE SYSTEMS | July 2019 | December 2021 | Allow | 29 | 3 | 0 | No | No |
| 16458021 | LOW DENSITY PARITY CHECK (LDPC) DECODER ARCHITECTURE WITH CHECK NODE STORAGE (CNS) OR BOUNDED CIRCULANT | June 2019 | April 2021 | Allow | 21 | 1 | 0 | No | No |
| 16453097 | METHOD AND APPARATUS FOR DESIGN OF PUNCTURED POLAR CODES | June 2019 | January 2021 | Allow | 19 | 1 | 0 | No | No |
| 16471617 | METHOD AND APPARATUS FOR VECTOR BASED LDPC BASE MATRIX USAGE AND GENERATION | June 2019 | February 2021 | Allow | 20 | 2 | 0 | Yes | No |
| 16429618 | METHOD OF EXECUTING INITIAL PROGRAM LOAD IN ELECTRONIC DEVICE | June 2019 | December 2020 | Abandon | 18 | 2 | 0 | No | No |
| 16423800 | CIRCUIT APPARATUS, ELECTRO-OPTICAL APPARATUS, ELECTRONIC DEVICE, AND MOBILE UNIT | May 2019 | February 2021 | Allow | 20 | 2 | 0 | Yes | No |
| 16420504 | ERROR CORRECTION CODE (ECC) AND DATA BUS INVERSION (DBI) ENCODING | May 2019 | August 2020 | Allow | 15 | 1 | 0 | No | No |
| 16420200 | MEMORY WITH ERROR CORRECTION CIRCUIT | May 2019 | September 2020 | Allow | 16 | 1 | 0 | No | No |
| 16346542 | ENCODING SYSTEM FOR INCREMENTAL REDUNDANCY FOR HYBRID ARQ FOR WIRELESS NETWORKS | May 2019 | July 2021 | Allow | 26 | 2 | 0 | Yes | No |
| 16345390 | METHOD AND APPARATUS FOR DATA PROCESSING IN A COMMUNICATION SYSTEM | April 2019 | August 2021 | Allow | 27 | 2 | 0 | No | Yes |
| 16299272 | MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATING METHOD THEREOF | March 2019 | August 2021 | Abandon | 30 | 2 | 0 | Yes | No |
| 16289738 | FAILURE MODE STUDY BASED ERROR CORRECTION | March 2019 | July 2021 | Allow | 28 | 2 | 0 | Yes | Yes |
| 16289723 | Retry-Read Method | March 2019 | August 2020 | Abandon | 18 | 1 | 0 | No | No |
| 16286246 | Multi Mode Memory Module with Data Handlers | February 2019 | September 2021 | Allow | 30 | 2 | 1 | Yes | No |
| 16253027 | Error Correction For Storage Devices | January 2019 | November 2020 | Allow | 22 | 1 | 0 | No | No |
| 16318815 | COMMUNICATION DEVICE, COMMUNICATION METHOD, AND PROGRAM | January 2019 | August 2021 | Allow | 31 | 3 | 0 | Yes | No |
| 16240697 | Scan-Chain Testing Via Deserializer Port | January 2019 | April 2021 | Allow | 27 | 2 | 0 | Yes | No |
| 16314949 | BASE STATION APPARATUS, TERMINAL APPARATUS, COMMUNICATION METHOD, AND INTEGRATED CIRCUIT | January 2019 | March 2022 | Allow | 39 | 5 | 0 | No | No |
| 16230929 | IN SYSTEM TEST OF CHIPS IN FUNCTIONAL SYSTEMS | December 2018 | March 2022 | Allow | 39 | 5 | 0 | Yes | No |
| 16227876 | MEMORY CONTROLLER AND MEMORY SYSTEM INCLUDING THE SAME | December 2018 | March 2021 | Allow | 27 | 2 | 0 | No | No |
| 16227021 | POWER LOSS TEST ENGINE DEVICE AND METHOD | December 2018 | December 2021 | Allow | 36 | 3 | 0 | Yes | No |
| 16220209 | TRANSISTION FAULT TESTING OF FUNTIONALLY ASYNCHRONOUS PATHS IN AN INTEGRATED CIRCUIT | December 2018 | November 2021 | Allow | 36 | 3 | 0 | No | No |
| 16220253 | TEST METHOD FOR TRANSMIT PORT OF STORAGE DEVICES OF SYSTEM HOST | December 2018 | November 2020 | Abandon | 23 | 2 | 0 | Yes | No |
| 16218159 | SELECTIVELY PERFORMING MULTI-PLANE READ OPERATIONS IN NON-VOLATILE MEMORY | December 2018 | February 2021 | Allow | 26 | 2 | 0 | No | No |
| 16213563 | DATA INTEGRITY IN NON-VOLATILE STORAGE | December 2018 | March 2021 | Abandon | 28 | 2 | 0 | Yes | No |
| 16199333 | MEMORY SYSTEM AND OPERATING METHOD OF THE MEMORY SYSTEM | November 2018 | October 2020 | Allow | 23 | 1 | 0 | No | No |
| 16153546 | SYSTEMS, METHODS, AND APPARATUS TO DETECT ADDRESS FAULTS | October 2018 | March 2021 | Allow | 29 | 2 | 0 | Yes | No |
| 16152170 | MEMORY SYSTEM | October 2018 | July 2021 | Abandon | 33 | 3 | 0 | Yes | No |
| 16152100 | MEMORY SYSTEM WITH DYNAMIC AUTO-REPAIRING FUNCTION AND OPERATING METHOD THEREOF | October 2018 | June 2020 | Abandon | 20 | 1 | 0 | No | No |
| 16151220 | MEMORY TESTING TECHNIQUES | October 2018 | January 2022 | Allow | 40 | 5 | 0 | No | No |
| 16150263 | MEMORY TESTING METHOD AND MEMORY TESTING SYSTEM | October 2018 | July 2021 | Allow | 34 | 4 | 0 | No | No |
| 16150064 | BUILT IN CONFIGURATION MEMORY TEST | October 2018 | August 2020 | Allow | 22 | 2 | 0 | Yes | No |
| 16150142 | SORT SYSTEM INCLUDING NORMALIZATION | October 2018 | January 2020 | Allow | 16 | 0 | 0 | No | No |
| 16148371 | DYNAMIC DEBUGGING OF CIRCUITS | October 2018 | June 2020 | Allow | 21 | 2 | 0 | Yes | No |
| 16145983 | TECHNIQUES TO A SET VOLTAGE LEVEL FOR A DATA ACCESS | September 2018 | May 2020 | Allow | 20 | 2 | 0 | Yes | No |
| 16129440 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR DESIGNING DEVICE, AND SEMICONDUCTOR TEST DEVICE | September 2018 | February 2021 | Abandon | 29 | 2 | 0 | No | No |
| 16045839 | AUTO DETECTION OF JTAG DEBUGGERS/EMULATORS | July 2018 | November 2020 | Abandon | 28 | 2 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner WAHLIN, MATTHEW W.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 100.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
Examiner WAHLIN, MATTHEW W works in Art Unit 2111 and has examined 80 patent applications in our dataset. With an allowance rate of 85.0%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 26 months.
Examiner WAHLIN, MATTHEW W's allowance rate of 85.0% places them in the 62% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.
On average, applications examined by WAHLIN, MATTHEW W receive 1.89 office actions before reaching final disposition. This places the examiner in the 42% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by WAHLIN, MATTHEW W is 26 months. This places the examiner in the 74% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.
Conducting an examiner interview provides a +9.3% benefit to allowance rate for applications examined by WAHLIN, MATTHEW W. This interview benefit is in the 41% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.
When applicants file an RCE with this examiner, 40.0% of applications are subsequently allowed. This success rate is in the 91% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.
This examiner enters after-final amendments leading to allowance in 50.0% of cases where such amendments are filed. This entry rate is in the 75% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.
When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 94% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.
This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 88% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
When applicants file petitions regarding this examiner's actions, 0.0% are granted (fully or in part). This grant rate is in the 1% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 8% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 9% percentile). This examiner rarely issues Quayle actions compared to other examiners. Allowances typically come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.