USPTO Examiner LU FARUN - Art Unit 2898

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17135758METHOD FOR FABRICATING A SEMICONDUCTOR DEVICEDecember 2020November 2022Allow2320NoNo
17123873DRAIN SIDE RECESS FOR BACK-SIDE POWER RAIL DEVICEDecember 2020January 2023Allow2511NoNo
17113836Semiconductor Device and Method of ManufactureDecember 2020November 2023Allow3511NoNo
17111956TRANSISTORS COMPRISING AT LEAST ONE OF GAP, GAN, AND GAASDecember 2020August 2022Allow2010NoNo
17112782COMMON RAIL CONTACTDecember 2020January 2023Allow2520YesNo
17104760Interconnect StructureNovember 2020January 2023Allow2621YesNo
17104218SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMENovember 2020September 2022Allow2211YesNo
16949953INTERCONNECT STRUCTURESNovember 2020June 2022Allow1911NoNo
16952526THREE-DIMENSIONAL MEMORY DEVICE CONTAINING OXIDATION-RESISTANT CONTACT STRUCTURES AND METHODS OF MAKING THE SAMENovember 2020March 2022Allow1610YesNo
16952503Composite Work Function Layer Formation Using Same Work Function MaterialNovember 2020July 2022Allow1911YesNo
17098014SEMICONDUCTOR CIRCUIT FOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMENovember 2020February 2023Allow2730YesNo
17095981Transistor Device StructureNovember 2020March 2023Abandon2820NoNo
16969771MAGNETORESISTIVE EFFECT ELEMENT AND MAGNETIC MEMORYNovember 2020January 2023Allow2930YesNo
17093345Semiconductor Device and Method of Forming ThereofNovember 2020September 2022Allow2211NoNo
17081738BARRIER LAYER FOR CONTACT STRUCTURES OF SEMICONDUCTOR DEVICESOctober 2020December 2022Allow2621YesNo
17077556Methods for Reducing Dual Damascene DistortionOctober 2020June 2022Allow2010NoNo
17076193MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICEOctober 2020May 2022Allow1910NoNo
17073413SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFOctober 2020March 2023Abandon2921NoNo
17061141SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEOctober 2020July 2022Allow2210YesNo
17061185SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEOctober 2020May 2022Allow1901NoNo
17036312ELECTRONIC DEVICE WITH SHORT CIRCUIT PROTECTION ELEMENT, FABRICATION METHOD AND DESIGN METHODSeptember 2020May 2022Allow2010YesNo
17027344SEMICONDUCTOR DEVICES WITH BACKSIDE POWER RAIL AND METHODS OF FABRICATION THEREOFSeptember 2020July 2022Allow2211YesNo
17018838SEMICONDUCTOR MEMORY DEVICESeptember 2020November 2023Allow3951YesNo
17017596INTERCONNECT STRUCTURE IN SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAMESeptember 2020July 2022Allow2211NoNo
17004902SEMICONDUCTOR DEVICE WITH INTERVENING LAYER AND METHOD FOR FABRICATING THE SAMEAugust 2020October 2022Allow2631NoNo
17000934SEMICONDUCTOR DEVICE INCLUDING HAVING METAL ORGANIC FRAMEWORK INTERLAYER DIELECTRIC LAYER BETWEEN METAL LINES AND METHODS OF FORMING THE SAMEAugust 2020April 2022Allow2010NoNo
17001247Bottom Lateral Expansion of Contact Plugs Through ImplantationAugust 2020July 2022Allow2321YesNo
16997616ION IMPLANT PROCESS FOR DEFECT ELIMINATION IN METAL LAYER PLANARIZATIONAugust 2020May 2022Allow2120YesNo
16994274Leakage Reduction in Gate-All-Around DevicesAugust 2020February 2022Allow1801NoNo
16990940CONNECTING STRUCTURE AND METHOD FOR FORMING THE SAMEAugust 2020October 2022Allow2621YesNo
16984468STRUCTURES AND SRAM BIT CELLS INTEGRATING COMPLEMENTARY FIELD-EFFECT TRANSISTORSAugust 2020January 2022Allow1710NoNo
16984962NAND FLASH BLOCK ARCHITECTURE ENHANCEMENT TO PREVENT BLOCK LIFTINGAugust 2020August 2023Allow3641YesNo
16984075METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICEAugust 2020May 2022Allow2111YesNo
16936656SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICEJuly 2020November 2022Abandon2821NoNo
16935686Source/Drain Contact StructureJuly 2020March 2022Allow1911YesNo
16922334INTERCONNECTION STRUCTURE OF INTEGRATED CIRCUIT SEMICONDUCTOR DEVICEJuly 2020March 2022Allow2010YesNo
16920589INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAMEJuly 2020January 2022Allow1910YesNo
16901572DUMBBELL SHAPED SELF-ALIGNED CAPPING LAYER OVER SOURCE/DRAIN CONTACTS AND METHOD THEREOFJune 2020December 2021Allow1801YesNo
16884908SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOFMay 2020March 2022Allow2211NoNo
16879983SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHODMay 2020February 2022Allow2110YesNo
16878215LIGHT-EMITTING DEVICE AND DISPLAY DEVICE USING THE SAMEMay 2020December 2021Allow1901YesNo
16876276INTEGRATED DIPOLE FLOW FOR TRANSISTORMay 2020November 2021Allow1810NoNo
16866628SEMICONDUCTOR DEVICE INCLUDING ACTIVE REGION AND GATE STRUCTUREMay 2020December 2021Allow1901NoNo
16862255MULTI-DEPOSITION PROCESS FOR HIGH QUALITY GALLIUM NITRIDE DEVICE MANUFACTURINGApril 2020January 2022Allow2110NoNo
16857288SEMICONDUCTOR DEVICE, LAYOUT DESIGN METHOD FOR THE SAME AND METHOD FOR FABRICATING THE SAMEApril 2020February 2022Allow2111YesNo
16854839NANOSTRUCTURE BARRIER FOR COPPER WIRE BONDINGApril 2020May 2021Allow1300NoNo
16854063ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEApril 2020April 2022Allow2420YesNo
168538393D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAMEApril 2020January 2022Allow2111YesNo
16851476SEMICONDUCTOR DEVICEApril 2020February 2022Allow2211YesNo
16850267Butted Contacts and Methods of Fabricating the Same in Semiconductor DevicesApril 2020October 2022Allow3031NoNo
16849101BOTTOM SOURCE/DRAIN FOR FIN FIELD EFFECT TRANSISTORSApril 2020January 2022Allow2111YesNo
16848575PUNCH THROUGH STOPPER IN BULK FINFET DEVICEApril 2020March 2022Allow2320YesNo
16847693TRANSISTOR STRUCTURE WITH REDUCED LEAKAGE CURRENT AND ADJUSTABLE ON/OFF CURRENTApril 2020November 2022Allow3131YesNo
16841994SUBTRACTIVE BACK-END-OF-LINE VIASApril 2020April 2022Allow2410YesNo
16839942FLUX-BIASING SUPERCONDUCTING QUANTUM PROCESSORSApril 2020August 2021Allow1610YesNo
16836665SEMICONDUCTOR PACKAGE HAVING MULTI-TIER BONDING WIRES AND COMPONENTS DIRECTLY MOUNTED ON THE MULTI-TIER BONDING WIRESMarch 2020October 2021Allow1910YesNo
16836428SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAMEMarch 2020February 2022Allow2321YesNo
16834121LIGHT DETECTION DEVICEMarch 2020February 2022Allow2211NoNo
16834460DISPLAY DEVICEMarch 2020November 2022Allow3141YesNo
16830859ELECTRONIC DEVICEMarch 2020August 2021Allow1710NoNo
16830215DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEMarch 2020November 2021Allow2020YesNo
16817692NANOSHEET SEMICONDUCTOR DEVICES WITH SIGMA SHAPED INNER SPACERMarch 2020March 2022Allow2421YesNo
16818321SEMICONDUCTOR STRUCTURE AND METHOD FORMATION METHOD THEREOFMarch 2020July 2021Allow1610YesNo
16646905THIN FILM CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOFMarch 2020November 2022Allow3211YesNo
16802275Transistors with Different Threshold VoltagesFebruary 2020June 2021Allow1501NoNo
16797020WRAP AROUND CONTACT PROCESS MARGIN IMPROVEMENT WITH EARLY CONTACT CUTFebruary 2020October 2021Allow2021YesNo
16779143METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEJanuary 2020May 2022Allow2731YesNo
16778346METHODS FOR FABRICATING MICROELECTRONIC DEVICES WITH CONTACTS TO CONDUCTIVE STAIRCASE STEPS, AND RELATED DEVICES AND SYSTEMSJanuary 2020June 2021Allow1701YesNo
16773337NANOSHEET DEVICE INTEGRATED WITH A FINFET TRANSISTORJanuary 2020July 2021Allow1701NoNo
16773848SEMICONDUCTOR DEVICE, METHOD OF MAKING A SEMICONDUCTOR DEVICE, AND PROCESSING SYSTEMJanuary 2020June 2021Allow1701YesNo
16750624ORGANIC ELECTROLUMINESCENT DISPLAY DEVICEJanuary 2020July 2021Allow1810NoNo
16751168SEMICONDUCTOR DEVICE WITH POROUS DIELECTRIC STRUCTURE AND METHOD FOR FABRICATING THE SAMEJanuary 2020January 2022Allow2431NoNo
16750009ORGANIC EL DISPLAY PANEL AND METHOD OF MANUFACTURING ORGANIC EL DISPLAY PANELJanuary 2020December 2021Allow2211YesNo
16749171TRANSISTOR HAVING CONFINED SOURCE/DRAIN REGIONS WITH WRAP-AROUND SOURCE/DRAIN CONTACTSJanuary 2020April 2022Allow2631NoNo
16748077DISPLAY DEVICEJanuary 2020March 2021Allow1400NoNo
16746618SEMICONDUCTOR DEVICE HAVING CONTACT FEATURE AND METHOD OF FABRICATING THE SAMEJanuary 2020December 2021Allow2321NoNo
16745716Butted Contacts and Methods of Fabricating the Same in Semiconductor DevicesJanuary 2020September 2021Allow2011NoNo
16744459SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEJanuary 2020June 2021Allow1701NoNo
16744480FIN FIELD EFFECT TRANSISTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAMEJanuary 2020June 2022Allow2941YesNo
16631059SEMICONDUCTOR DEVICES WITH METAL CONTACTS INCLUDING CRYSTALLINE ALLOYSJanuary 2020March 2021Allow1410NoNo
16733832Forming Bottom Source and Drain Extension on Vertical Transport FET (VTFET)January 2020March 2021Allow1400NoNo
16733427HALF BURIED nFET/pFET EPITAXY SOURCE/DRAIN STRAPJanuary 2020April 2021Allow1601YesNo
16729239DISPLAY PANEL AND DISPLAY DEVICEDecember 2019February 2021Allow1400NoNo
16718205APPARATUS RELATED TO CONFORMAL COATING IMPLEMENTED WITH SURFACE MOUNT DEVICESDecember 2019December 2020Allow1210YesNo
16717052Methods For Growing Light Emitting Devices Under Ultra-Violet IlluminationDecember 2019April 2021Allow1611NoNo
16717600CONTACT AND VIA STRUCTURES FOR SEMICONDUCTOR DEVICESDecember 2019March 2022Allow2711YesNo
16710572THREE-DIMENSIONAL MEMORY DEVICE CONTAINING PLURAL WORK FUNCTION WORD LINES AND METHODS OF FORMING THE SAMEDecember 2019April 2021Allow1610NoNo
16707958METHODS OF FORMING ELECTRONIC DEVICESDecember 2019October 2021Allow2221NoNo
16704796Semiconductor Device with Integrated Clamp DiodeDecember 2019May 2021Allow1810NoNo
16705138NANOTWINNED STRUCTUREDecember 2019July 2022Allow3110NoNo
16699496SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMENovember 2019March 2021Allow1601NoNo
16692571Novel Structure for Metal Gate Electrode and Method of FabricationNovember 2019October 2021Allow2311YesNo
16688500PROTUBERANT CONTACTS FOR RESISTIVE SWITCHING DEVICESNovember 2019April 2021Allow1710NoNo
16686830MICROELECTRONIC DEVICES INCLUDING STAIR STEP STRUCTURES, AND RELATED ELECTRONIC DEVICES AND METHODSNovember 2019September 2021Allow2221YesNo
16686682Method for Reducing Metal Plug Corrosion and DeviceNovember 2019May 2021Allow1701YesNo
16683894GATE-ALL-AROUND TRANSISTOR STRUCTURENovember 2019May 2021Allow1811YesNo
16681225FIELD-EFFECT TRANSISTOR STRUCTURE AND FABRICATION METHODNovember 2019August 2021Allow2121YesNo
16677798Method of Forming a Source/DrainNovember 2019August 2021Allow2211YesNo
16676291SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAMENovember 2019January 2021Allow1510NoNo
16610120FIXING OF LED STRIPSNovember 2019February 2021Allow1620NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner LU, FARUN.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
2
Examiner Affirmed
1
(50.0%)
Examiner Reversed
1
(50.0%)
Reversal Percentile
76.3%
Higher than average

What This Means

With a 50.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
5
Allowed After Appeal Filing
2
(40.0%)
Not Allowed After Appeal Filing
3
(60.0%)
Filing Benefit Percentile
66.9%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 40.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner LU, FARUN - Prosecution Strategy Guide

Executive Summary

Examiner LU, FARUN works in Art Unit 2898 and has examined 534 patent applications in our dataset. With an allowance rate of 92.1%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner LU, FARUN's allowance rate of 92.1% places them in the 78% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by LU, FARUN receive 1.54 office actions before reaching final disposition. This places the examiner in the 25% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by LU, FARUN is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +7.6% benefit to allowance rate for applications examined by LU, FARUN. This interview benefit is in the 37% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.8% of applications are subsequently allowed. This success rate is in the 81% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 41.3% of cases where such amendments are filed. This entry rate is in the 64% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 80.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 65% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 66.7% of appeals filed. This is in the 51% percentile among all examiners. Of these withdrawals, 75.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 30.3% are granted (fully or in part). This grant rate is in the 16% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 4.1% of allowed cases (in the 80% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.