USPTO Examiner PHAM LONG - Art Unit 2897

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18768003SEMICONDUCTOR DEVICEJuly 2024October 2025Allow1511NoNo
18761522DISPLAY PANEL AND DISPLAY DEVICEJuly 2024August 2025Allow1410NoNo
18757428THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES WITH NEAR ZERO BOND LINE THICKNESSJune 2024March 2026Allow2021NoNo
18744728SEMICONDUCTOR PACKAGE DEVICE WITH INTEGRATED INDUCTOR AND MANUFACTURING METHOD THEREOFJune 2024August 2025Allow1410NoNo
18743810METAL INSULATOR METAL CAPACITOR STRUCTURE HAVING HIGH CAPACITANCEJune 2024July 2025Allow1310YesNo
18739424SEMICONDUCTOR DEVICE WITH SELF-ALIGNED WAVEGUIDE AND METHOD THEREFORJune 2024February 2026Allow2011NoNo
18737527SEMICONDUCTOR PACKAGEJune 2024April 2025Allow1001NoNo
18678306SEMICONDUCTOR DEVICE HAVING A PASSIVATION LAYERMay 2024June 2025Allow1210NoNo
18669118SEMICONDUCTOR PACKAGEMay 2024February 2026Allow2111YesNo
18655932SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEMay 2024July 2025Allow1510YesNo
18648599PACKAGE SUBSTRATE HAVING POROUS DIELECTRIC LAYERApril 2024November 2025Allow1911NoNo
18645786SEMICONDUCTOR PACKAGE STRUCTUREApril 2024May 2025Allow1301NoNo
18644953ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFApril 2024August 2025Allow1511NoNo
18643424ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFApril 2024August 2025Allow1511NoNo
18637737SEMICONDUCTOR DEVICE WITH COMPOSITE MIDDLE INTERCONNECTORSApril 2024June 2025Allow1411NoNo
18617492PLATED WALLS DEFINING MOLD COMPOUND CAVITIESMarch 2024September 2025Allow1811NoNo
18613954BONDING THROUGH MULTI-SHOT LASER REFLOWMarch 2024November 2025Allow2011NoNo
18602665VIA FOR SEMICONDUCTOR DEVICE CONNECTIONMarch 2024February 2026Allow2311NoNo
18601094SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFMarch 2024October 2025Allow1911NoNo
18599734EMBEDDED STRESS ABSORBER IN PACKAGEMarch 2024October 2025Allow1911NoNo
18595421DIE AND PACKAGE STRUCTUREMarch 2024September 2025Allow1811YesNo
18587981SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEFebruary 2024March 2025Allow1201NoNo
18587998SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFFebruary 2024August 2025Allow1811NoNo
18581162CONTACT FORMATION METHOD AND RELATED STRUCTUREFebruary 2024November 2025Allow2111NoNo
18440068Cooling Device and Process for Cooling Double-Sided SiP Devices During SputteringFebruary 2024July 2025Allow1721NoNo
18439132POWER REDUCTION IN FINFET STRUCTURESFebruary 2024September 2025Allow1911YesNo
18433228METHODS RELATED TO DUAL-SIDED MODULE WITH LAND-GRID ARRAY (LGA) FOOTPRINTFebruary 2024June 2025Allow1711NoNo
18421198SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEJanuary 2024March 2025Allow1311NoNo
18415143SEMICONDUCTOR DEVICE HAVING EPITAXY SOURCE/DRAIN REGIONSJanuary 2024May 2025Allow1611NoNo
18407410ELECTRICAL BRIDGE PACKAGE WITH INTEGRATED OFF-BRIDGE PHOTONIC CHANNEL INTERFACEJanuary 2024August 2024Allow711NoNo
18403974SEMICONDUCTOR PACKAGE STRUCTUREJanuary 2024September 2025Allow2021NoNo
18401769SELF-ALIGNED SPACERS FOR MULTI-GATE DEVICES AND METHOD OF FABRICATION THEREOFJanuary 2024March 2025Allow1511NoNo
18397898METHOD TO IMPLEMENT WAFER-LEVEL CHIP-SCALE PACKAGES WITH GROUNDED CONFORMAL SHIELDDecember 2023May 2025Allow1611NoNo
18541305SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOFDecember 2023September 2025Allow2111NoNo
18536773mmWAVE ANTENNA-FILTER MODULEDecember 2023June 2025Allow1810NoNo
18530423SELECTIVE ETCHES FOR REDUCING CONE FORMATION IN SHALLOW TRENCH ISOLATIONSDecember 2023July 2025Allow2010NoNo
18522890SEMICONDUCTOR STRUCTURE WITH SUPERLATTICESNovember 2023March 2026Allow2711NoNo
18519862CONTACT STRUCTURE OF A SEMICONDUCTOR DEVICENovember 2023July 2025Allow2011NoNo
18513866SEMICONDUCTOR DIE PACKAGE WITH CONDUCTIVE LINE CRACK PREVENTION DESIGNNovember 2023May 2025Allow1811NoNo
18506327Memory Arrays, and Methods of Forming Memory ArraysNovember 2023July 2025Allow2011NoNo
18494827SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICEOctober 2023June 2025Allow1911NoNo
18494897DISPLAY SUBSTRATE AND DISPLAY DEVICEOctober 2023April 2025Allow1810NoNo
18482743PACKAGE STRUCTURE AND METHOD OF FORMING THEREOFOctober 2023February 2025Allow1611NoNo
18475926SEMICONDUCTOR PACKAGESeptember 2023August 2024Allow1101NoNo
18472244FILTER PACKAGE STRUCTURE AND METHOD FOR PREPARING SAMESeptember 2023March 2024Allow611NoNo
18459248RF CIRCUIT MODULE AND MANUFACTURING METHOD THEREFORAugust 2023September 2024Allow1301NoNo
18231871IMAGING DEVICE AND ELECTRONIC DEVICEAugust 2023September 2024Allow1310NoNo
18231382DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAMEAugust 2023October 2024Allow1401NoNo
18361122Methods for Fabricating FinFETs Having Different Fin Numbers and Corresponding FinFETs ThereofJuly 2023July 2024Allow1101NoNo
18226264SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJuly 2023July 2024Allow1210NoNo
18359688Semiconductor Device and Method of Forming a Slot in EMI Shielding with Improved Removal DepthJuly 2023January 2025Allow1811NoNo
18226262SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJuly 2023October 2024Allow1520NoNo
18355524HYBRID BOND PAD STRUCTUREJuly 2023January 2025Allow1811NoNo
18346767METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICEJuly 2023December 2024Allow1811NoNo
18217721SEMICONDUCTOR DEVICE WITH COMPOSITE MIDDLE INTERCONNECTORSJuly 2023August 2024Allow1311NoNo
18210392INTEGRATED FUSEJune 2023June 2024Allow1201NoNo
18204505SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEJune 2023January 2025Allow1911YesNo
18323239SEMICONDUCTOR PACKAGES INCLUDING DAM PATTERNS AND METHODS FOR MANUFACTURING THE SAMEMay 2023March 2025Allow2111NoNo
18322440SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION LAYERMay 2023November 2024Allow1811NoNo
18322374PLANARIZED MEMBRANE AND METHODS FOR SUBSTRATE PROCESSING SYSTEMSMay 2023October 2025Allow2921NoNo
18321391Semiconductor Device and Method of Forming Bump Pad Array on Substrate for Ground Connection for Heat Sink/Shielding StructureMay 2023November 2024Allow1811NoNo
18303595CHIP PACKAGE AND MANUFACTURING METHOD THEREOFApril 2023February 2025Allow2221YesNo
18135541SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR PACKAGEApril 2023March 2026Allow3501NoNo
18134796MATERIALS, STRUCTURES, AND METHODS FOR OPTICAL AND ELECTRICAL III-NITRIDE SEMICONDUCTOR DEVICESApril 2023February 2025Allow2201NoNo
18135067EMIB PATCH ON GLASS LAMINATE SUBSTRATEApril 2023July 2024Allow1510NoNo
18297469SUBSTRATE POLISHING APPARATUS AND POLISHING LIQUID DISCHARGE METHOD IN SUBSTRATE POLISHING APPARATUSApril 2023August 2024Allow1710NoNo
18188720Semiconductor Device and Method of Partial Shielding with Embedded Graphene Core ShellsMarch 2023January 2026Allow3411NoNo
18188844Semiconductor Device and Method of Forming a 3-D Stacked Semiconductor Package StructureMarch 2023January 2026Allow3411NoNo
18124653PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAMEMarch 2023March 2026Allow3511NoNo
18187786POLISHING METHOD AND POLISHING APPARATUSMarch 2023April 2024Allow1301NoNo
18124069ADAPTER BOARD AND METHOD FOR FORMING SAME, PACKAGING METHOD, AND PACKAGE STRUCTUREMarch 2023April 2024Allow1300NoNo
18185602FinFET Device and Methods of Forming the SameMarch 2023July 2024Allow1611NoNo
18182111SEMICONDUCTOR PACKAGES INCLUDING ANTENNA PATTERNMarch 2023November 2024Allow2121YesNo
18024109CHIP STRUCTURE, METHOD FOR MANUFACTURING CHIP STRUCTURE, AND ELECTRONIC DEVICEMarch 2023February 2026Abandon3501NoNo
18176695SEMICONDUCTOR PACKAGEMarch 2023October 2025Allow3201NoNo
18174790Selective EMI Shielding Using Preformed Mask with Fang DesignFebruary 2023December 2024Allow2231NoNo
18113062METHOD FOR FABRICATING ELECTRONIC PACKAGE STRUCTUREFebruary 2023July 2024Allow1711NoNo
18106203SEMICONDUCTOR PACKAGE USING A POLYMER SUBSTRATEFebruary 2023September 2024Allow1911NoNo
18162878SEMICONDUCTOR PACKAGEFebruary 2023July 2024Allow1810YesNo
18103584SEMICONDUCTOR PACKAGEJanuary 2023July 2024Allow1711NoNo
18103175STORAGE DEVICE INCLUDING CONFIGURABLE PRINTED CIRCUIT BOARDJanuary 2023September 2025Allow3211YesNo
18099136SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICEJanuary 2023July 2024Allow1811NoNo
18097965ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFJanuary 2023February 2024Allow1301NoNo
18097847ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFJanuary 2023December 2024Allow2321NoNo
18151917COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR IMAGE SENSOR AND METHOD OF MAKINGJanuary 2023August 2024Allow2011NoNo
18150634Semiconductor Device and Method of Making a Semiconductor Package with Graphene-Coated InterconnectsJanuary 2023December 2025Allow3511NoNo
18149205CERAMIC LAMINATED SUBSTRATE, MODULE, AND METHOD OF MANUFACTURING CERAMIC LAMINATED SUBSTRATEJanuary 2023September 2024Allow2021NoNo
18149472Process Control for Package FormationJanuary 2023August 2024Allow1921NoNo
18148440ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFDecember 2022January 2026Allow3711NoNo
18090801MICROELECTRONIC ASSEMBLIESDecember 2022June 2024Allow1711NoNo
18086610ISOLATED TRANSFORMER WITH INTEGRATED SHIELD TOPOLOGY FOR REDUCED EMIDecember 2022December 2023Allow1201NoNo
18085859FAN-OUT TYPE SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEDecember 2022January 2026Allow3711YesNo
18067494ARRAY SUBSTRATE AND DISPLAY PANELDecember 2022March 2026Allow3911NoNo
18067565THROUGH MOLDING CONTACT ENABLED EMI SHIELDINGDecember 2022January 2026Allow3711NoNo
18066448INTEGRATED BARE DIE PACKAGE, AND RELATED FABRICATION METHODSDecember 2022March 2026Allow3911NoNo
18082012SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESDecember 2022March 2026Allow3911NoNo
18064027INTEGRATED CIRCUIT HAVING NON-INTEGRAL MULTIPLE PITCHDecember 2022July 2024Allow1911NoNo
18063442ELECTRONIC PACKAGEDecember 2022September 2025Allow3301NoNo
18063065SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEDecember 2022March 2026Allow3911NoNo
18071797PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAMENovember 2022March 2026Allow4011NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner PHAM, LONG.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
3
Examiner Affirmed
2
(66.7%)
Examiner Reversed
1
(33.3%)
Reversal Percentile
53.5%
Higher than average

What This Means

With a 33.3% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
24
Allowed After Appeal Filing
11
(45.8%)
Not Allowed After Appeal Filing
13
(54.2%)
Filing Benefit Percentile
74.6%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 45.8% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner PHAM, LONG - Prosecution Strategy Guide

Executive Summary

Examiner PHAM, LONG works in Art Unit 2897 and has examined 537 patent applications in our dataset. With an allowance rate of 99.6%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 24 months.

Allowance Patterns

Examiner PHAM, LONG's allowance rate of 99.6% places them in the 94% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by PHAM, LONG receive 1.30 office actions before reaching final disposition. This places the examiner in the 18% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by PHAM, LONG is 24 months. This places the examiner in the 84% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.4% benefit to allowance rate for applications examined by PHAM, LONG. This interview benefit is in the 17% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 37.3% of applications are subsequently allowed. This success rate is in the 85% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 50.3% of cases where such amendments are filed. This entry rate is in the 76% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 114.3% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 81% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 88.0% of appeals filed. This is in the 81% percentile among all examiners. Of these withdrawals, 45.5% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 48.6% are granted (fully or in part). This grant rate is in the 44% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 12.5% of allowed cases (in the 95% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 22.4% of allowed cases (in the 94% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.