USPTO Examiner OWENS DOUGLAS W - Art Unit 2897

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18666964NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD THEREOFMay 2024January 2026Allow2000NoNo
18664195SEMICONDUCTOR DEVICEMay 2024October 2025Allow1700NoNo
18654028SiC SEMICONDUCTOR DEVICEMay 2024July 2025Allow1500NoNo
18654713SUBSTRATE ASSEMBLY AND ELECTRONIC DEVICE INCLUDING THE SAMEMay 2024December 2025Allow1910NoNo
18615075Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting DeviceMarch 2024October 2025Allow1900NoNo
18601003SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFMarch 2024June 2025Allow1510NoNo
18592048MANUFACTURING METHOD OF FLIP CHIP PACKAGE STRUCTUREFebruary 2024February 2025Allow1200NoNo
18590337LIGHT-EMITTING DIODE DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICEFebruary 2024March 2025Allow1200NoNo
18587823SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEFebruary 2024June 2025Allow1610NoNo
18429789CHIP STRUCTUREFebruary 2024May 2025Allow1601NoNo
18430074BUMP STRUCTURE AND METHOD OF MANUFACTURING BUMP STRUCTUREFebruary 2024July 2025Allow1701NoNo
18404708MOISTURE HERMETIC GUARD RING FOR SEMICONDUCTOR ON INSULATOR DEVICESJanuary 2024May 2025Allow1710NoNo
18401790METHOD OF MANUFACTURING DISPLAY APPARATUSJanuary 2024March 2026Allow2600NoNo
18575370LIGHT-RECEIVING DEVICE, X-RAY IMAGING DEVICE, AND ELECTRONIC APPARATUSDecember 2023March 2026Allow2710NoNo
18574057SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTUREDecember 2023February 2026Allow2500NoNo
18395058INNER SPACERS FOR GATE-ALL-AROUND SEMICONDUCTOR DEVICESDecember 2023February 2025Allow1401NoNo
18539355SEMICONDUCTOR DEVICEDecember 2023January 2026Allow2500NoNo
18537960SEMICONDUCTOR PACKAGEDecember 2023February 2026Allow2600NoNo
18535342SOLDER JOINTDecember 2023December 2024Allow1200NoNo
18533194ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICESDecember 2023February 2026Allow2600NoNo
18529241SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAMEDecember 2023March 2026Allow2700NoNo
18567132IMAGING DEVICE AND ELECTRONIC DEVICEDecember 2023January 2026Allow2600NoNo
18566891SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICEDecember 2023February 2026Allow2700NoNo
18524932DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMENovember 2023February 2026Allow2700NoNo
18518798THREE-DIMENSIONAL MEMORY DEVICE HAVING SOURCE-SELECT-GATE CUT STRUCTURES AND METHODS FOR FORMING THE SAMENovember 2023February 2025Allow1510NoNo
18514466ELECTROPLATED INDIUM BUMP STACKS FOR CRYOGENIC ELECTRONICSNovember 2023January 2025Allow1400YesNo
18512896DISPLAY DEVICENovember 2023January 2026Allow2600NoNo
18510056SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION LAYERSNovember 2023February 2026Allow2700NoNo
18502389SOLDER BASED HYBRID BONDING FOR FINE PITCH AND THIN BLT INTERCONNECTIONNovember 2023April 2025Allow1811NoNo
18489871ELECTRONIC SUBSTRATE AND ELECTRONIC DEVICEOctober 2023March 2025Allow1710NoNo
18489389SEMICONDUCTOR DEVICEOctober 2023October 2024Allow1200NoNo
18484310PLATED METAL LAYER IN POWER PACKAGESOctober 2023April 2025Allow1810NoNo
18482944MULTILAYER PACKAGE SUBSTRATE WITH STRESS BUFFEROctober 2023June 2025Allow2020NoNo
18375687Platinum-Based Solder Body Contacts for Integration of a First Substrate with a Second SubstrateOctober 2023January 2026Allow2800NoNo
18474275HYBRID MANUFACTURING FOR INTEGRATED CIRCUIT DEVICES AND ASSEMBLIESSeptember 2023December 2024Allow1510YesNo
18469469SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICESeptember 2023February 2025Allow1710NoNo
18236545SEMICONDUCTOR PACKAGEAugust 2023September 2024Allow1310NoNo
18446834POLYIMIDE PROFILE CONTROLAugust 2023December 2024Allow1610YesNo
18231032Semiconductor Device and MethodAugust 2023October 2024Allow1510NoNo
18230416SEMICONDUCTOR PACKAGEAugust 2023January 2026Allow2910YesNo
18365891Routing Substrates with Cavities for Component StackingAugust 2023February 2026Allow3110NoNo
18228746BONDING STRUCTURE OF SEMICONDUCTOR PACKAGE DEVICE, SEMICONDUCTOR PACKAGE DEVICE, AND METHOD FOR MANUFACTURING THE SAMEAugust 2023January 2026Allow2910YesNo
18361400ELECTRONIC DEVICEJuly 2023October 2025Allow2700NoNo
18357757Package Substrate Insulation Opening DesignJuly 2023March 2025Allow2011NoNo
18354859METHOD FOR FORMING AN IMAGE SENSORJuly 2023March 2025Allow2011NoNo
18353389INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAMEJuly 2023October 2025Allow2700NoNo
18346701INTEGRATED DEVICE COMPRISING METALLIZATION INTERCONNECTSJuly 2023January 2026Allow3110NoNo
18214572FLIP CHIP PACKAGE AND SUBSTRATE THEREOFJune 2023September 2025Allow2700NoNo
18339865ELECTRONICS ASSEMBLIES EMPLOYING COPPER IN MULTIPLE LOCATIONSJune 2023October 2024Allow1610NoNo
18212665SEMICONDUCTOR INTERCONNECT STRUCTURES WITH CONDUCTIVE ELEMENTS, AND ASSOCIATED SYSTEMS AND METHODSJune 2023September 2024Allow1510NoNo
18212453SEMICONDUCTOR PACKAGEJune 2023September 2025Allow2700NoNo
18258435HALF-BURIED ELECTRICAL CONNECTION INSERT ROD DEVICEJune 2023January 2026Allow3110NoNo
18210132SEMICONDUCTOR PACKAGEJune 2023May 2024Allow1100NoNo
18327178SEMICONDUCTOR DEVICE UNDER BUMP STRUCTURE AND METHOD THEREFORJune 2023December 2024Abandon1910NoNo
18327831SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFJune 2023August 2025Allow2700NoNo
18325136SEMICONDUCTOR PACKAGEMay 2023October 2024Allow1710YesNo
18324673CONDUCTIVE MEMBER CAVITIESMay 2023September 2024Allow1610NoNo
18322658SEMICONDUCTOR DEVICE HAVING WIRED UNDER BUMP STRUCTURE AND METHOD THEREFORMay 2023December 2025Allow3110NoNo
18313560SEMICONDUCTOR DEVICES AND SEMICONDUCTOR PACKAGES INCLUDING THE SAMEMay 2023April 2024Allow1100NoNo
18138752SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEApril 2023October 2024Allow1820NoNo
18180599SiC SEMICONDUCTOR DEVICEMarch 2023February 2024Allow1100NoNo
18118865DISPLAY DEVICEMarch 2023September 2025Allow3000NoNo
18177876Superconducting Bump Bonds for Quantum Computing SystemsMarch 2023September 2024Allow1910YesNo
18170204DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEFebruary 2023January 2026Allow3510NoNo
18167369SEMICONDUCTOR PACKAGEFebruary 2023September 2024Allow1910NoNo
18166869METHODS OF MANUFACTURING SEMICONDUCTOR PACKAGESFebruary 2023March 2024Allow1300NoNo
18104402DISPLAY DEVICEFebruary 2023August 2025Allow3100NoNo
18152176SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFJanuary 2023January 2026Allow3710NoNo
18092140THERMAL MANAGEMENT SOLUTIONS FOR EMBEDDED INTEGRATED CIRCUIT DEVICESDecember 2022July 2024Allow1910NoNo
18145976FRONT-SIDE TYPE IMAGE SENSORSDecember 2022December 2024Allow2321NoNo
18145814DISPLAY PANELDecember 2022July 2025Allow3100NoNo
18080683SEMICONDUCTOR PACKAGEDecember 2022June 2024Allow1810YesNo
18064910MIDDLE-END-OF-LINE STRAP FOR STANDARD CELLDecember 2022May 2024Allow1801NoNo
18072426SEMICONDUCTOR PACKAGE CONDUCTIVE TERMINALS WITH REDUCED PLATING THICKNESSNovember 2022October 2025Allow3401NoNo
18055403DISPLAY DEVICE INCLUDING A WIRING PAD AND METHOD FOR MANUFACTURING THE SAMENovember 2022October 2025Allow3501NoNo
17967107Efficient Integration of a First Substrate without Solder Bumps with a Second Substrate Having Solder BumpsOctober 2022August 2025Allow3410NoNo
17958518DISPLAY APPARATUSOctober 2022October 2025Allow3610NoNo
17958007ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICESSeptember 2022April 2025Allow3110NoNo
17956029ELECTRONIC DEVICESeptember 2022February 2024Allow1610NoNo
17950106METHOD AND APPARATUS FOR TRIMMING MICRO ELECTRONIC ELEMENTSeptember 2022July 2025Allow3401NoNo
17947401Array Of Vertical Transistors And Method Used In Forming An Array Of Vertical TransistorsSeptember 2022February 2025Allow2912NoNo
17933272SEMICONDUCTOR PACKAGESeptember 2022April 2025Allow3100NoNo
17944645DISPLAY APPARATUSSeptember 2022March 2025Allow3000NoNo
17944018SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICESeptember 2022June 2024Allow2110YesNo
17930304MICROELECTRONIC DEVICE PACKAGES AND RELATED METHODS AND SYSTEMSSeptember 2022April 2025Allow3100NoNo
17903337PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE INCLUDING THE SAMESeptember 2022July 2025Allow3420YesNo
17898777SEMICONDUCTOR PACKAGE WITH BALL GRID ARRAY CONNECTION HAVING IMPROVED RELIABILITYAugust 2022March 2025Allow3000NoNo
17896097PACKAGE STRUCTUREAugust 2022March 2025Allow3000NoNo
17822470SEMICONDUCTOR PACKAGE AND METHODAugust 2022August 2025Allow3510NoNo
17895397SEMICONDUCTOR DEVICE, SUBSTRATE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEAugust 2022June 2025Allow3410NoNo
17799918Display Substrate and Preparation Method Therefor, and Display ApparatusAugust 2022June 2025Allow3400NoNo
17796657DISPLAY PANEL AND MANUFACTURING METHOD THEREOF, AND ELECTRONIC TERMINALJuly 2022January 2025Allow2900NoNo
17873804INTEGRATED CIRCUIT TEST METHOD AND STRUCTURE THEREOFJuly 2022September 2024Allow2620NoNo
17873673CHIP PACKAGE STRUCTUREJuly 2022March 2024Allow1910NoNo
17794658ORGANIC EL DISPLAY DEVICE, PRODUCTION METHOD FOR CURED PRODUCT, AND PRODUCTION METHOD FOR ORGANIC EL DISPLAY DEVICEJuly 2022June 2025Allow3510NoNo
17868226INTEGRATED FAN-OUT STRUCTURES AND METHODS FOR FORMING THE SAMEJuly 2022July 2024Allow2420NoNo
17791652CONDUCTIVE PILLAR, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING BONDED STRUCTUREJuly 2022March 2025Allow3210NoNo
17856965LIQUID METAL BASED FIRST LEVEL INTERCONNECTSJuly 2022January 2026Allow4310NoNo
17809854EFFICIENT REDISTRIBUTION LAYER TOPOLOGYJune 2022July 2024Allow2420NoNo
17850999METHOD OF MANUFACTURING ELECTRONIC DEVICE WITH REDUCED SUBSTRATE WARPAGEJune 2022February 2025Allow3210NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner OWENS, DOUGLAS W.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
7.7%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner OWENS, DOUGLAS W - Prosecution Strategy Guide

Executive Summary

Examiner OWENS, DOUGLAS W works in Art Unit 2897 and has examined 43 patent applications in our dataset. With an allowance rate of 97.7%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 36 months.

Allowance Patterns

Examiner OWENS, DOUGLAS W's allowance rate of 97.7% places them in the 89% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by OWENS, DOUGLAS W receive 1.23 office actions before reaching final disposition. This places the examiner in the 16% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by OWENS, DOUGLAS W is 36 months. This places the examiner in the 36% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +2.6% benefit to allowance rate for applications examined by OWENS, DOUGLAS W. This interview benefit is in the 23% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 26.7% of applications are subsequently allowed. This success rate is in the 45% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 75.0% of cases where such amendments are filed. This entry rate is in the 94% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 95% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 50.0% are granted (fully or in part). This grant rate is in the 48% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 28.6% of allowed cases (in the 95% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.