USPTO Examiner JUNGE BRYAN R - Art Unit 2897

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17119948DISPLAY DEVICEDecember 2020August 2024Allow4450YesNo
16952762DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAMENovember 2020June 2022Allow1900NoNo
17056748DISPLAY PANEL AND MANUFACTURING METHOD THEREOFNovember 2020February 2025Abandon5121NoNo
17051185DISPLAY PANEL AND DISPLAY DEVICEOctober 2020May 2022Allow1800NoNo
17044994IMAGING DEVICE AND METHOD OF MANUFACTURING IMAGING DEVICEOctober 2020February 2024Allow4010NoNo
17026856DISPLAY SUBSTRATE AND DISPLAY DEVICE INCLUDING THE SAMESeptember 2020April 2022Allow1900NoNo
16980172ACTIVE-MATRIX SUBSTRATE AND DISPLAY DEVICESeptember 2020August 2022Allow2310NoNo
17008797IMAGE SENSOR FOR COMPENSATING FOR SIGNAL DIFFERENCE BETWEEN PIXELSSeptember 2020November 2022Abandon2610NoNo
16994680ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICEAugust 2020October 2024Abandon5041YesNo
16987115FLEXIBLE DISPLAY DEVICEAugust 2020October 2022Allow2620NoNo
16966163DISPLAY PANELJuly 2020February 2023Abandon3120NoNo
16960102DISPLAY PANELJuly 2020March 2022Allow2110NoNo
16911930DISPLAY DEVICEJune 2020April 2025Abandon5761NoNo
16771227ORGANIC LIGHT-EMITTING DIODE SUBSTRATEJune 2020January 2023Abandon3120NoNo
16881722DISPLAY DEVICEMay 2020April 2022Allow2200NoNo
16877303LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAMEMay 2020February 2022Allow2110NoNo
16870087GATE STRUCTURE FOR SEMICONDUCTOR DEVICESMay 2020November 2022Allow3040YesNo
16853689Bottom-Up Growth of Silicon Oxide and Silicon Nitride Using Sequential Deposition-Etch-Treat ProcessingApril 2020October 2021Allow1800NoNo
16650690DISPLAY SUBSTRATE, SPLICING SCREEN AND MANUFACTURING METHOD THEREOFMarch 2020June 2022Allow2721NoNo
16828487INTEGRATED DEVICE COMPRISING TRANSISTOR COUPLED TO A DUMMY GATE CONTACTMarch 2020April 2022Allow2420NoNo
16824196SYMMETRICAL TWO-DIMENSIONAL FIN STRUCTURE FOR VERTICAL FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAMEMarch 2020December 2021Allow2101NoNo
16822390METHOD OF DEPOSITING SILICON OXIDE FILMSMarch 2020October 2021Allow1911NoNo
16809730SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2020March 2023Abandon3631NoNo
16641239ARRAY SUBSTRATE AND DISPLAY PANELFebruary 2020November 2022Abandon3320NoNo
16729519FABRICATING METAL-OXIDE SEMICONDUCTOR DEVICE USING A POST-LINEAR-ANNEAL OPERATIONDecember 2019February 2022Abandon2610NoNo
16625722DISPLAY PANEL AND METHOD OF FABRICATING SAMEDecember 2019February 2022Allow2610NoNo
16623781DISPLAY PANEL AND INTELLIGENT TERMINALDecember 2019June 2022Abandon3020NoNo
16623089ARRAY SUBSTRABE, DISPLAY PANEL, AND MANUFACTURING METHOD OF ARRAY SUBSTRATEDecember 2019February 2022Allow2610NoNo
16709323SEMICONDUCTOR DEVICEDecember 2019July 2021Allow2000NoNo
16613118ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, FLEXIBLE DISPLAY PANELNovember 2019April 2022Allow3010NoNo
16674823Memory Arrays, and Methods of Forming Memory ArraysNovember 2019October 2021Allow2320NoNo
16672652SEMICONDUCTOR PACKAGENovember 2019January 2022Allow2720NoNo
16603097OLED DISPLAY AND METHOD FOR MANUFACTURING SAMEOctober 2019February 2022Allow2810NoNo
16500708ORGANIC LIGHT-EMITTING DIODE ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAMEOctober 2019January 2022Allow2710NoNo
16588423DISPLAY DEVICESeptember 2019October 2021Allow2510NoNo
16565200SEMICONDUCTOR DEVICE AND ELECTRONIC APPLIANCESeptember 2019September 2022Allow3640YesNo
16489500ARRAY SUBSTRATE AND DISPLAY DEVICE HAVING THE ARRAY SUBSTRATEAugust 2019February 2022Allow2910NoNo
16489405THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY PANEL THEREOFAugust 2019October 2022Abandon3820NoNo
16485438FLEXIBLE ARRAY SUBSTRATE, DISPLAY PANEL, AND MANUFACTURING METHODAugust 2019August 2022Abandon3620NoNo
16483396GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFORAugust 2019April 2021Allow2110NoNo
16529831SEMICONDUCTOR DEVICE HAVING NOISE ISOLATION BETWEEN POWER REGULATOR CIRCUIT AND ELECTROSTATIC DISCHARGE CLAMP CIRCUITAugust 2019October 2021Abandon2601NoNo
16483302SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEAugust 2019July 2021Abandon2310NoNo
16529805COMPOSITE STORAGE LAYER FOR MAGNETIC RANDOM ACCESS MEMORY DEVICESAugust 2019July 2021Allow2410NoNo
16529989Integrated Fan-Out Packages and Methods of Forming the SameAugust 2019December 2021Allow2820NoNo
16529796PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAMEAugust 2019June 2021Allow2310NoNo
16529970SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICEAugust 2019November 2021Allow2820NoNo
16529979SEMICONDUCTOR MEMORY DEVICEAugust 2019August 2021Allow2510YesNo
16529779SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEAugust 2019September 2022Allow3761YesNo
16519816ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEJuly 2019August 2021Allow2520NoNo
16518682Semiconductor Device and MethodJuly 2019December 2020Allow1710NoNo
16455494COOLING TECHNIQUES FOR SEMICONDUCTOR PACKAGEJune 2019December 2021Abandon3021YesNo
16469651OLED DISPLAY DEVICE AND MANUFACTURING METHOD THEREOFJune 2019September 2022Abandon3920NoNo
16437857DISPLAY DEVICE INCLUDING A CMOS TRANSISTOR AND METHOD OF MANUFACTURING THE SAMEJune 2019January 2022Abandon3130NoNo
16426445IMAGE SENSOR FOR COMPENSATING FOR SIGNAL DIFFERENCE BETWEEN PIXELSMay 2019July 2020Allow1400NoNo
16426365CHIP PACKAGE WITH ANTENNA ELEMENTMay 2019January 2021Allow1910NoNo
16366066DISPLAY DEVICE AND MANUFACTURING METHOD THEREOFMarch 2019May 2020Allow1420NoNo
16299362Semiconductor Layer Including Compositional InhomogeneitiesMarch 2019October 2020Allow1910YesNo
16246805SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAMEJanuary 2019October 2020Allow2110NoNo
16197258SEMICONDUCTOR STRUCTURE WITH ENLARGED GATE ELECTRODE STRUCTURE AND METHOD FOR FORMING THE SAMENovember 2018February 2021Allow2721YesNo
16193905STRUCTURE AND METHOD OF LATCHUP ROBUSTNESS WITH PLACEMENT OF THROUGH WAFER VIA WITHIN CMOS CIRCUITRYNovember 2018December 2020Allow2520NoNo
16179645ELONGATED SEMICONDUCTOR STRUCTURE PLANARIZATIONNovember 2018August 2020Allow2110NoNo
16149125SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEOctober 2018June 2020Allow2010NoNo
16132702SEMICONDUCTOR DEVICE AND OPTICAL COUPLING DEVICESeptember 2018July 2020Allow2210NoNo
16113388METHOD FOR MANUFACTURING A MULTILAYER STRUCTURE WITH EMBEDDED FUNCTIONALITIES AND RELATED MULTILAYER STRUCTUREAugust 2018April 2022Allow4390YesNo
16110389CIRCUIT MODULE AND MANUFACTURING METHOD THEREOFAugust 2018February 2020Allow1700YesNo
16050678Semiconductor Devices, Methods of Manufacture Thereof, and Packaged Semiconductor DevicesJuly 2018May 2020Allow2210NoNo
16047586SRAM Cell with Balanced Write PortJuly 2018October 2019Allow1500NoNo
16018616SEMICONDUCTOR DEVICEJune 2018August 2019Allow1400NoNo
16001159METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEJune 2018June 2019Allow1200NoNo
16001251Selective Deposition Of Silicon Using Deposition-Treat-Etch ProcessJune 2018March 2021Allow3420NoNo
16001144METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEJune 2018February 2020Allow2020NoNo
16001258Bottom-Up Growth Of Silicon Oxide And Silicon Nitride Using Sequential Deposition-Etch-Treat ProcessingJune 2018December 2019Allow1810NoNo
15997558DUAL ACTIVE LAYER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJune 2018December 2020Abandon3021YesNo
15950239NANOWIRE ENABLED SUBSTRATE BONDING AND ELECTRICAL CONTACT FORMATIONApril 2018June 2020Allow2730YesNo
15950209LOW RESISTANCE METAL-INSULATOR-METAL CAPACITOR ELECTRODEApril 2018June 2020Allow2730YesNo
15950179POWER SEMICONDUCTOR DEVICEApril 2018December 2019Abandon2020NoNo
15950356THREE-DIMENSIONAL MEMORY DEVICE CONTAINING BIDIRECTIONAL TAPER STAIRCASES AND METHODS OF MAKING THE SAMEApril 2018May 2020Allow2521NoNo
15950364SELF-ALIGNED MULTIPLE PATTERNING PROCESSES WITH LAYERED MANDRELSApril 2018July 2019Allow1501NoNo
15950372VERTICALLY STACKED MULTI-CHANNEL TRANSISTOR STRUCTUREApril 2018March 2019Allow1101NoNo
15950182SENSING ELEMENT AND SENSING DISPLAY PANELApril 2018April 2019Allow1200NoNo
15767623IMAGE SENSING CHIP PACKAGING STRUCTURE AND PACKAGING METHOD THEREFORApril 2018March 2020Abandon2320NoNo
15767417FLAT PLATE TYPE OF IMAGE SENSORApril 2018November 2019Abandon1920NoNo
15950021STRING SELECT LINE GATE OXIDE METHOD FOR 3D VERTICAL CHANNEL NAND MEMORYApril 2018November 2021Abandon4360YesNo
15949184EMISSIVE LED DISPLAY DEVICE MANUFACTURING METHODApril 2018November 2022Abandon5570YesNo
15949141TECHNIQUES FOR DIE TILINGApril 2018September 2024Abandon60120YesNo
15950000SEMICONDUCTOR PACKAGEApril 2018September 2020Abandon2930NoNo
15949159HETEROGENEOUS INTEGRATED CIRCUITS WITH INTEGRATED COVERSApril 2018November 2020Abandon3140YesNo
15949938DISPLAY DEVICEApril 2018May 2019Allow1310NoNo
15948627Methods of Forming Sources and Drains for FinFETs Using Solid Phase Epitaxy With Laser AnnealingApril 2018June 2019Abandon1410NoNo
15948660Side-Emitting LED with Increased IlluminationApril 2018July 2022Abandon5271YesNo
15948756IMAGE SENSOR FOR COMPENSATING FOR SIGNAL DIFFERENCE BETWEEN PIXELSApril 2018February 2019Allow1010NoNo
15948747COOLING TECHNIQUES FOR SEMICONDUCTOR PACKAGEApril 2018March 2019Allow1110NoNo
15948639Memory ArraysApril 2018January 2019Allow1011NoNo
15943967ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEApril 2018May 2019Allow1320NoNo
15913286Hybrid Electronically Erasable Programmable Read-Only Memory (EEPROM) Systems And Methods For Forming Related ApplicationsMarch 2018February 2019Allow1210NoNo
15891312METHOD FOR FILLING PATTERNSFebruary 2018November 2019Allow2130NoNo
15872939EXTENDED DRAIN TRANSISTOR ON A CRYSTALLINE-ON-INSULATOR SUBSTRATEJanuary 2018January 2019Allow1210NoNo
15871271DISPLAY DEVICE INCLUDING A CMOS TRANSISTOR AND METHOD OF MANUFACTURING THE SAMEJanuary 2018January 2020Abandon2421YesNo
15871525THIN FILM TRANSISTOR, DISPLAY SUBSTRATE, METHODS FOR MANUFACTURING THE SAME AND DISPLAY DEVICEJanuary 2018March 2019Abandon1410NoNo
15871267LIGHT EMITTING DIODE APPARATUS AND METHOD FOR MANUFACTURING THE SAMEJanuary 2018October 2018Allow901NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner JUNGE, BRYAN R..

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
14
Examiner Affirmed
8
(57.1%)
Examiner Reversed
6
(42.9%)
Reversal Percentile
65.7%
Higher than average

What This Means

With a 42.9% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
25
Allowed After Appeal Filing
8
(32.0%)
Not Allowed After Appeal Filing
17
(68.0%)
Filing Benefit Percentile
50.3%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 32.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner JUNGE, BRYAN R. - Prosecution Strategy Guide

Executive Summary

Examiner JUNGE, BRYAN R. works in Art Unit 2897 and has examined 507 patent applications in our dataset. With an allowance rate of 61.9%, this examiner allows applications at a lower rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 25 months.

Allowance Patterns

Examiner JUNGE, BRYAN R.'s allowance rate of 61.9% places them in the 23% percentile among all USPTO examiners. This examiner is less likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by JUNGE, BRYAN R. receive 2.47 office actions before reaching final disposition. This places the examiner in the 68% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by JUNGE, BRYAN R. is 25 months. This places the examiner in the 79% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -7.5% benefit to allowance rate for applications examined by JUNGE, BRYAN R.. This interview benefit is in the 5% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 13.6% of applications are subsequently allowed. This success rate is in the 11% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 30.7% of cases where such amendments are filed. This entry rate is in the 46% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 40.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 38% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 39.1% of appeals filed. This is in the 7% percentile among all examiners. Of these withdrawals, 33.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 84.6% are granted (fully or in part). This grant rate is in the 86% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 35% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Prepare for rigorous examination: With a below-average allowance rate, ensure your application has strong written description and enablement support. Consider filing a continuation if you need to add new matter.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.