USPTO Examiner TRAN TONY - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17255490DISPLAY PANEL, METHOD OF MANUFACTURING THEREOF, AND DISPLAY DEVICEDecember 2020October 2024Abandon4621NoNo
17111838SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEDecember 2020February 2024Allow3920YesYes
16950549SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR MEMORY DEVICENovember 2020April 2024Allow4140YesNo
17087968SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICENovember 2020February 2024Allow3940YesNo
17064834THREE-DIMENSIONAL NAND MEMORY DEVICE WITH REDUCED REVERSE DIPOLE EFFECT AND METHOD FOR FORMING THE SAMEOctober 2020November 2024Allow4941YesYes
17062373MICROELECTRONIC DEVICES WITH SLIT STRUCTURES INCLUDING METAL PLUGS AND RELATED SYSTEMSOctober 2020January 2024Allow3941YesNo
17043781DISPLAY DEVICE AND FABRICATION METHOD THEREOFSeptember 2020October 2024Allow4821YesYes
17021627MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMESeptember 2020June 2025Abandon5761YesYes
17005267SEMICONDUCTOR MEMORY DEVICEAugust 2020October 2024Abandon5051NoNo
16963503ELECTRODE CONNECTION ELEMENT, LIGHT-EMITTING DEVICE COMPRISING SAME, AND METHOD FOR PRODUCING LIGHT-EMITTING DEVICEJuly 2020August 2024Abandon4941NoNo
16857888PIXEL AND DISPLAY DEVICE HAVING THE SAMEApril 2020January 2025Allow5641YesYes
16832803MULTI-LAYER INDUCTORMarch 2020May 2025Allow6040YesYes
16606906IMAGING DEVICE AND ELECTRONIC DEVICEOctober 2019April 2024Allow5451YesNo
16423700INTEGRATED CIRCUIT PACKAGES WITH SOLDER THERMAL INTERFACE MATERIALS WITH EMBEDDED PARTICLESMay 2019December 2024Allow6061YesNo
15810670Anneal Techniques for Chalcogenide SemiconductorsNovember 2017May 2018Allow600YesNo
15797791DIFFUSION BARRIER LAYER FORMATIONOctober 2017September 2018Allow1101YesNo
15683989SN DOPED ZNS NANOWIRES FOR WHITE LIGHT SOURCE MATERIALAugust 2017July 2018Allow1100NoNo
15595602DOUBLE ASPECT RATIO TRAPPINGMay 2017July 2018Allow1420YesNo
15519058DEPOSITION MASK, DEPOSITION DEVICE, DEPOSITION METHOD, AND DEPOSITION MASK MANUFACTURING METHODApril 2017July 2018Allow1501NoNo
15179378ADVANCED METALLIZATION FOR DAMAGE REPAIRJune 2016June 2017Allow1320YesNo
15162164DOUBLE ASPECT RATIO TRAPPINGMay 2016January 2017Allow700YesNo
15162221DOUBLE ASPECT RATIO TRAPPINGMay 2016June 2017Allow1210NoNo
15137307Anneal Techniques for Chalcogenide SemiconductorsApril 2016June 2016Allow200YesNo
14950301SEMICONDUCTOR DEVICE, MODULE, AND ELECTRONIC DEVICENovember 2015November 2016Allow1101NoNo
14949815ADVANCED METALLIZATION FOR DAMAGE REPAIRNovember 2015May 2017Allow2821YesNo
14612344SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICEFebruary 2015July 2016Allow1821YesNo
14501137DIFFUSION BARRIER LAYER FORMATIONSeptember 2014April 2016Allow1901YesNo
14500244DOUBLE ASPECT RATIO TRAPPINGSeptember 2014March 2016Allow1701YesNo
14500304III-V FinFET CMOS WITH III-V AND GERMANIUM-CONTAINING CHANNEL CLOSELY SPACEDSeptember 2014January 2016Allow1601YesNo
14498965MICROELECTROMECHANICAL SYSTEM (MEMS) BOND RELEASE STRUCTURE AND METHOD OF WAFER TRANSFER FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT (3D IC) INTEGRATIONSeptember 2014January 2018Allow3961NoNo
14378643METHOD FOR PRODUCING A RADIATION-EMITTING SEMICONDUCTOR COMPONENTAugust 2014March 2017Allow3140NoYes
14123638METHOD AND APPARATUS FOR MOLDING ENCAPSULANT OF LIGHT EMITTING DEVICEMarch 2014August 2017Allow4441YesYes
14203745SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2014March 2016Allow2441YesNo
14141559SYSTEM AND METHOD FOR FORMING AN ALUMINUM FUSE FOR COMPATIBILITY WITH COPPER BEOL INTERCONNECT SCHEMEDecember 2013August 2014Allow800YesNo
14027837METHODS FOR FABRICATING INTEGRATED CIRCUITSSeptember 2013May 2015Allow2021YesNo
13861074REVERSE-CONDUCTING SEMICONDUCTOR DEVICEApril 2013January 2015Allow2220YesYes
13856246HIGH-K METAL GATE DEVICE STRUCTURE FOR HUMAN BLOOD GAS SENSINGApril 2013January 2016Allow3431YesNo
13738735METHOD OF FABRICATING CIGS BY SELENIZATION AT HIGH TEMPERATUREJanuary 2013December 2013Allow1120YesNo
13737846Back-Contact for Thin Film Solar Cells Optimized for Light Trapping for Ultrathin AbsorbersJanuary 2013November 2014Allow2210YesNo
13611081NANOWIRE EFUSESSeptember 2012April 2014Allow1930YesNo
13569394METHODOLOGY FOR EVALUATION OF ELECTRICAL CHARACTERISTICS OF CARBON NANOTUBESAugust 2012April 2013Abandon820YesNo
13488532CIRCUIT TECHNIQUE TO ELECTRICALLY CHARACTERIZE BLOCK MASK SHIFTSJune 2012October 2014Allow2822YesNo
13488870SYSTEM AND METHOD FOR FORMING ALUMINUM FUSE FOR COMPATIBILITY WITH COPPER BEOL INTERCONNECT SCHEMEJune 2012August 2014Allow2621YesNo
13513923SEMICONDUCTOR DEVICE USING CLOSE PROXIMITY WIRELESS COMMUNICATIONJune 2012November 2014Allow2921YesNo
13500034UNIT FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICEJune 2012July 2014Allow2821YesNo
13394097Optoelectronic Module Comprising at Least One First Semiconductor Body Having a Radiation Outlet Side and an Insulation Layer and Method for the Production ThereofMay 2012June 2014Allow2721YesNo
13393577WIRING CONNECTION METHOD AND FUNCTIONAL DEVICEMay 2012April 2014Allow2521YesNo
13446462Patterning Embedded Control Lines for Vertically Stacked Semiconductor ElementsApril 2012July 2014Allow2740YesNo
13408187STRUCTURE AND METHOD OF FORMING ENHANCED ARRAY DEVICE ISOLATION FOR IMPLANTED PLATE EDRAMFebruary 2012February 2015Allow3521YesNo
13399659PACKAGED MICROELECTRONIC DEVICES RECESSED IN SUPPORT MEMBER CAVITIES, AND ASSOCIATED METHODSFebruary 2012December 2012Allow1010NoNo
13385264High-voltage transistor device with integrated resistorFebruary 2012June 2014Allow2820YesNo
13369460THREE DIMENSIONAL INTEGRATED DEEP TRENCH DECOUPLING CAPACITORSFebruary 2012January 2013Allow1120YesNo
13355748LOCALIZED ALLOYING FOR IMPROVED BOND RELIABILITYJanuary 2012February 2016Allow4841YesYes
13344628STRUCTURE, SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE AND PACKAGING THEREOFJanuary 2012November 2014Allow3541YesNo
13344765NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEJanuary 2012May 2014Allow2821YesNo
13285062MANUFACTURING METHOD OF PHOTOELECTRIC CONVERSION DEVICEOctober 2011April 2014Allow2921YesNo
13284080METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEOctober 2011September 2013Allow2311NoNo
13283291BACK-CONTACT FOR THIN FILM SOLAR CELLS OPTIMIZED FOR LIGHT TRAPPING FOR ULTRATHIN ABSORBERSOctober 2011June 2014Allow3241YesNo
13264209METHOD OF MANUFACTURING OLED-ON-SILICONOctober 2011February 2014Allow2821YesNo
13283225METHOD OF FABRICATING CIGS BY SELENIZATION AT HIGH TEMPERATUREOctober 2011October 2013Allow2321YesNo
13200688METHOD OF DIVIDING A SEMICONDUCTOR WAFER HAVING SEMICONDUCTOR AND METAL LAYERS INTO SEPARATE DEVICESSeptember 2011February 2013Allow1711YesNo
13211870METHOD FOR FORMING CU FILM AND STORAGE MEDIUMAugust 2011November 2013Allow2721YesNo
13101766LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAMEMay 2011June 2012Allow1310NoNo
13079280SOLID-STATE IMAGING DEVICE AND CAMERAApril 2011July 2012Allow1520YesNo
12949210SOLID-STATE IMAGING DEVICE AND CAMERANovember 2010April 2012Allow1721YesNo
12941799LED-Based Light Source Utilizing Asymmetric ConductorsNovember 2010February 2013Allow2751YesYes
12906766METHOD FOR PROVIDING OXIDE LAYERSOctober 2010May 2014Allow4240YesNo
12904104GYROSCOPEOctober 2010May 2012Allow2000NoNo
12872020MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH IMPROVED LAYOUT DESIGN AND PROCESS THEREOFAugust 2010December 2010Allow400NoNo
12846020METHOD OF FORMING SEMICONDUCTOR STRUCTURES WITH CONTACT HOLESJuly 2010July 2016Allow6051YesYes
12820880METHODOLOGY FOR EVALUATION OF ELECTRICAL CHARACTERISTICS OF CARBON NANOTUBESJune 2010May 2014Allow4761YesNo
12819646REVERSE-CONDUCTING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SUCH A REVERSE-CONDUCTING SEMICONDUCTOR DEVICEJune 2010January 2013Allow3021YesYes
12773248SOLID-STATE IMAGING DEVICE AND CAMERAMay 2010January 2012Allow2020NoNo
12659600METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICEMarch 2010November 2012Allow3221YesNo
12694715METHOD OF FABRICATING SELF-ALIGNED CONTACT PAD USING CHEMICAL MECHANICAL POLISHING PROCESSJanuary 2010April 2010Allow300NoNo
12636539AUTO FEEDBACK APPARATUS FOR LASER MARKINGDecember 2009January 2012Allow2511NoNo
12605971METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEOctober 2009September 2010Allow1000YesNo
12511517METHOD FOR PREFERENTIAL GROWTH OF SEMICONDUCTING VERTICALLY ALIGNED SINGLE WALLED CARBON NANOTUBESJuly 2009January 2012Allow2910NoNo
12511119DIGITAL RADIOGRAPHIC FLAT-PANEL IMAGING ARRAY WITH DUAL HEIGHT SEMICONDUCTOR AND METHOD OF MAKING SAMEJuly 2009February 2011Allow1901NoNo
12509780THREE DIMENSIONAL INTEGRATED DEEP TRENCH DECOUPLING CAPACITORSJuly 2009November 2011Allow2721YesNo
12524138THIN-FILM TRANSISTOR FABRICATION PROCESS AND DISPLAY DEVICEJuly 2009March 2013Allow4331YesNo
12457290SEMICONDUCTOR DEVICEJune 2009December 2011Allow3011NoNo
12302740SEMICONDUCTOR DEVICEJune 2009August 2013Allow5731YesNo
12476799NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING SAMEJune 2009August 2010Allow1401NoNo
12425850HEAT CONDUCTIVE PLATE STRUCTUREApril 2009June 2011Allow2601YesNo
12379348COPOLYMERS, POLYMER RESIN COMPOSITION FOR BUFFER LAYER METHOD OF FORMING A PATTERN USING THE SAME AND METHOD OF MANUFACTURING A CAPACITOR USING THE SAMEFebruary 2009March 2010Allow1300NoNo
12320279SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJanuary 2009August 2010Allow1920NoNo
12320278SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJanuary 2009May 2011Allow2721NoNo
12320240MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJanuary 2009February 2011Allow2500NoNo
12277329CAPACITIVE SENSOR AND MANUFACTURING METHOD THEREFORNovember 2008February 2012Allow3820NoYes
12275489SOLID-STATE IMAGING DEVICE AND CAMERANovember 2008March 2013Allow5161YesYes
12273719CMOS RF ICNovember 2008March 2012Allow4050YesNo
12174357ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FINJuly 2008May 2010Allow2211NoNo
12160044METHOD FOR FABRICATING ROBUST LIGHT-EMITTING DIODESJuly 2008December 2011Allow4110NoNo
12150609METHOD OF FORMING ISOLATION STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT SUBSTRATEApril 2008February 2011Allow3320NoNo
11970579METHOD AND STRUCTURE TO PROTECT FETS FROM PLASMA DAMAGE DURING FEOL PROCESSINGJanuary 2008August 2010Allow3221NoNo
11965698METHOD FOR FABRICATING CAPACITORDecember 2007April 2011Allow4021NoNo
11928913DIELECTRIC MATERIAL WITH A REDUCED DIELECTRIC CONSTANT AND METHODS OF MANUFACTURING THE SAMEOctober 2007January 2011Allow3920NoNo
11851082MANUFACTURE METHOD FOR SEMICONDUCTOR DEVICE HAVING FIELD OXIDE FILMSeptember 2007December 2009Allow2711NoNo
11778516SEMICONDUCTOR MODULEJuly 2007August 2009Allow2521NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner TRAN, TONY.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
5
Examiner Affirmed
2
(40.0%)
Examiner Reversed
3
(60.0%)
Reversal Percentile
83.8%
Higher than average

What This Means

With a 60.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
29
Allowed After Appeal Filing
15
(51.7%)
Not Allowed After Appeal Filing
14
(48.3%)
Filing Benefit Percentile
84.1%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 51.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner TRAN, TONY - Prosecution Strategy Guide

Executive Summary

Examiner TRAN, TONY works in Art Unit 2893 and has examined 125 patent applications in our dataset. With an allowance rate of 96.0%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 29 months.

Allowance Patterns

Examiner TRAN, TONY's allowance rate of 96.0% places them in the 85% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by TRAN, TONY receive 2.58 office actions before reaching final disposition. This places the examiner in the 72% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by TRAN, TONY is 29 months. This places the examiner in the 64% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +2.9% benefit to allowance rate for applications examined by TRAN, TONY. This interview benefit is in the 25% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 27.6% of applications are subsequently allowed. This success rate is in the 51% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 20.8% of cases where such amendments are filed. This entry rate is in the 28% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 95.2% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 70% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 84.4% of appeals filed. This is in the 78% percentile among all examiners. Of these withdrawals, 59.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 50.0% are granted (fully or in part). This grant rate is in the 45% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 10.4% of allowed cases (in the 94% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.7% of allowed cases (in the 68% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.