USPTO Examiner SPALLA DAVID C - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18760656TRANSISTOR GATE STRUCTURES AND METHODS OF FORMING THE SAMEJuly 2024September 2025Allow1400NoNo
18741166ETCH PROFILE CONTROL OF ISOLATION TRENCHJune 2024June 2025Allow1210NoNo
18741029HIGH PERFORMANCE IMAGE SENSORJune 2024May 2025Allow1110NoNo
18732484Power Semiconductor Packaging and Manufacturing Method ThereofJune 2024August 2024Allow300NoNo
18674989SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOFMay 2024October 2025Allow1610NoNo
18672936STACKING CMOS STRUCTUREMay 2024June 2025Allow1310NoNo
18667417INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAMEMay 2024December 2024Allow700NoNo
18657993SEMICONDUCTOR DEVICEMay 2024January 2025Allow810NoNo
18647307INTEGRATED CIRCUIT CHIP INCLUDING GATE ELECTRODE WITH OBLIQUE CUT SURFACE, AND MANUFACTURING METHOD OF THE SAMEApril 2024December 2024Allow700NoNo
18631008LIGHT EMITTING DIODE PACKAGE, DIVISIONAL DISPLAY MODULE, AND DISPLAY PANELApril 2024April 2025Allow1310NoNo
18621840SEMICONDUCTOR MEMORY DEVICES WITH DIELECTRIC FIN STRUCTURESMarch 2024March 2025Allow1210NoNo
18617746NANO-FET SEMICONDUCTOR DEVICE AND METHOD OF FORMINGMarch 2024March 2025Allow1210YesNo
18617422SEMICONDUCTOR DEVICEMarch 2024October 2025Allow1900NoNo
18615049SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAMEMarch 2024November 2024Allow800NoNo
18609982SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFMarch 2024May 2025Allow1420NoNo
18594124Method for Manufacturing a Semiconductor DeviceMarch 2024March 2025Allow1310NoNo
18443994FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEFebruary 2024December 2024Allow1010NoNo
18442574SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAMEFebruary 2024October 2024Allow800NoNo
18434577Passivation Layers For Semiconductor DevicesFebruary 2024July 2025Allow1710NoNo
18415281SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTUREJanuary 2024January 2025Allow1210NoNo
18414039INTEGRATED CIRCUIT DEVICEJanuary 2024December 2024Allow1110NoNo
18408098SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJanuary 2024February 2025Allow1310NoNo
18405736SEMICONDUCTOR DEVICE AND STACK OF SEMICONDUCTOR CHIPSJanuary 2024December 2024Allow1100NoNo
18404606SEMICONDUCTOR DEVICE AND METHODJanuary 2024July 2025Allow1810NoNo
18538378SEMICONDUCTOR DEVICE INCLUDING MAGNETIC TUNNEL JUNCTION STRUCTUREDecember 2023February 2026Allow2600NoNo
18527470SEMICONDUCTOR DEVICEDecember 2023February 2026Allow2600NoNo
18527453INTEGRATED CIRCUIT DEVICEDecember 2023February 2025Allow1410YesNo
18522687UNIFORM GATE WIDTH FOR NANOSTRUCTURE DEVICESNovember 2023June 2025Allow1920NoNo
18520730SEMICONDUCTOR DEVICE WITH BACKSIDE GATE ISOLATION STRUCTURE AND METHOD FOR FORMING THE SAMENovember 2023December 2024Allow1300NoNo
18518349Tunable Josephson Junction with Added DopantsNovember 2023March 2026Allow2810NoNo
18516064THREE-DIMENSIONAL MEMORY DEVICE INCLUDING CRACK-RESISTANT BACKSIDE PASSIVATION STRUCTURE AND METHODS OF FORMING THE SAMENovember 2023February 2026Allow2700NoNo
18515908METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICENovember 2023January 2025Allow1410NoNo
18510402GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DUAL NANORIBBON CHANNEL STRUCTURESNovember 2023March 2025Allow1610NoNo
18507473MOSFET DEVICE STRUCTURE WITH AIR-GAPS IN SPACER AND METHODS FOR FORMING THE SAMENovember 2023June 2025Allow1920NoNo
18500225SEMICONDUCTOR DEVICE STRUCTURE WITH CHANNEL AND METHOD FOR FORMING THE SAMENovember 2023January 2025Allow1410NoNo
18499423CRYSTAL SEED LAYER FOR MAGNETIC RANDOM ACCESS MEMORY (MRAM)November 2023June 2025Allow1920NoNo
18499153METHOD TO SUPPRESS BASE POLY LINKUP OVERGROWTH INTO THE EMITTER CAVITY DURING SILICON GERMANIUM SELECTIVE EPITAXY GROWTHOctober 2023February 2026Allow2700NoNo
18378710SEMICONDUCTOR DEVICESOctober 2023March 2025Allow1710YesNo
18470186DISPLAY DEVICESeptember 2023September 2024Allow1200NoNo
18235358SEMICONDUCTOR DEVICEAugust 2023August 2024Allow1200NoNo
18234889METHOD FOR FABRICATING SEMICONDUCTOR DEVICEAugust 2023October 2024Allow1410NoNo
18449734SEMICONDUCTOR DEVICESAugust 2023August 2024Allow1200NoNo
18446998Optimized Proximity Profile for Strained Source/Drain Feature and Method of Fabricating ThereofAugust 2023January 2025Allow1810NoNo
18232027SELF-ALIGNED ENCAPSULATION HARD MASK TO SEPARATE PHYSICALLY UNDER-ETCHED MTJ CELLS TO REDUCE CONDUCTIVE RE-DEPOSITIONAugust 2023November 2024Allow1510NoNo
18362776GATE-ALL-AROUND DEVICES WITH SUPERLATTICE CHANNELJuly 2023February 2025Allow1910NoNo
18361491TRANSISTORS HAVING VERTICAL NANOSTRUCTURESJuly 2023March 2025Allow2010NoNo
18227712SPACER STRUCTURES FOR SEMICONDUCTOR DEVICESJuly 2023February 2025Allow1910NoNo
18359695SEMICONDUCTOR DEVICE AND METHODJuly 2023September 2024Allow1410NoNo
18358757SEMICONDUCTOR DEVICE WITH METAL GATE FILL STRUCTUREJuly 2023September 2024Allow1410NoNo
183548202D-Channel Transistor Structure with Source-Drain EngineeringJuly 2023September 2024Allow1410NoNo
18355073Gate Air Spacer for Fin-Like Field Effect TransistorJuly 2023October 2024Allow1410NoNo
18216885SELECTIVE BACKSIDE RECESSING OF SOURCE AND DRAIN REGIONSJune 2023October 2025Allow2700NoNo
18346020POST-FORMATION MENDS OF DIELECTRIC FEATURESJune 2023September 2024Allow1410NoNo
18215254SEMICONDUCTOR DEVICESJune 2023October 2025Allow2700NoNo
18343555Partial Directional Etch Method and Resulting StructuresJune 2023August 2024Allow1310NoNo
18214642STACKED FET WITH LOW PARASITIC-CAPACITANCE GATEJune 2023March 2026Allow3210NoNo
18341081MULTI-GATE DEVICE AND RELATED METHODSJune 2023August 2024Allow1310NoNo
18341334Integrated Circuit Structure with Source/Drain SpacersJune 2023September 2025Allow2700NoNo
18212258SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAMEJune 2023July 2024Allow1310NoNo
18337044CHIP PACKAGE AND METHOD OF FORMING THE SAMEJune 2023October 2024Allow1510NoNo
18336788INNER SPACER FEATURES FOR MULTI-GATE TRANSISTORSJune 2023May 2024Allow1100NoNo
18336269THREE-DIMENSIONAL (3D) FIELD EFFECT TRANSISTORS (FETS) WITH GATE CUTS TO ENHANCE CARRIER MOBILITY AND RELATED FABRICATION METHODSJune 2023January 2026Allow3110NoNo
18208895SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJune 2023June 2024Allow1210NoNo
18333981TRANSISTOR GATE STRUCTURES AND METHODS OF FORMING THE SAMEJune 2023September 2024Allow1610NoNo
18334301FIN-BASED FIELD EFFECT TRANSISTOR (FET) SOURCE/DRAIN STRAIN TO ENHANCE DRIVER CURRENT AND PERFORMANCEJune 2023December 2025Allow3010YesNo
18324636SEMICONDUCTOR DEVICE WITH GATE DIELECTRIC FORMED USING SELECTIVE DEPOSITIONMay 2023October 2024Allow1610NoNo
18323587SELECTIVE SILICIDE FOR STACKED MULTI-GATE DEVICEMay 2023August 2025Allow2700NoNo
18323070DISPLAY DEVICE AND ELECTRONIC APPARATUSMay 2023October 2024Allow1710NoNo
18321785SEMICONDUCTOR DEVICE HAVING SIDE SPACER PATTERNSMay 2023December 2025Allow3110NoNo
18316956FIELD-EFFECT TRANSISTOR DEVICE WITH GATE SPACER STRUCTUREMay 2023July 2024Allow1410NoNo
18315578SEMICONDUCTOR DEVICE STRUCTUREMay 2023July 2024Allow1410NoNo
18314923SEMICONDUCTOR DEVICES HAVING CONDUCTIVE PAD STRUCTURES WITH MULTI-BARRIER FILMSMay 2023March 2024Allow1100NoNo
18313060ENHANCED-SHAPED EXTENSION REGION(S) FOR GATE-ALL-AROUND (GAA) FIELD EFFECT TRANSISTOR (FET) DEVICE, AND RELATED FABRICATION METHODSMay 2023January 2026Allow3210NoNo
18311066SEAL MATERIAL FOR AIR GAPS IN SEMICONDUCTOR DEVICESMay 2023January 2025Allow2120NoNo
18309433SPACER STRUCTURE FOR SEMICONDUCTOR DEVICEApril 2023February 2025Allow2120YesNo
18139985SEMICONDUCTOR DEVICEApril 2023October 2025Allow3010NoNo
18305383MANUFACTURING METHOD FOR HIGH-VOLTAGE TRANSISTORApril 2023September 2024Abandon1710NoNo
18137767SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOFApril 2023November 2025Allow3110NoNo
18304521HIGH PERFORMANCE IMAGE SENSORApril 2023May 2024Allow1310NoNo
18305118SEMICONDUCTOR DEVICE STRUCTURE WITH INNER SPACERApril 2023July 2024Allow1510NoNo
18305269SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFApril 2023December 2023Allow800NoNo
18302132Transistor Gate Structures and Methods of Forming the SameApril 2023March 2024Allow1110NoNo
18130732SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAMEApril 2023August 2025Allow2800NoNo
18128417SEMICONDUCTOR DEVICESMarch 2023August 2025Allow2800NoNo
18127298SEMICONDUCTOR DEVICEMarch 2023August 2025Allow2900NoNo
18190837SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEMarch 2023July 2025Allow2700NoNo
18189538SEMICONDUCTOR DEVICESMarch 2023October 2025Allow3010NoNo
18185414INTEGRATED CIRCUIT INCLUDING STANDARD CELLS AND METHOD OF DESIGNING THE SAMEMarch 2023June 2025Allow2700NoNo
18185941INTEGRATED CIRCUIT DEVICEMarch 2023June 2025Allow2700NoNo
18120879SEMICONDUCTOR DEVICEMarch 2023January 2024Allow1010NoNo
18119037INTEGRATED CIRCUIT DEVICEMarch 2023September 2025Allow3110YesNo
18044090NANOWIRE/NANOSHEET DEVICE HAVING SELF-ALIGNED ISOLATION PORTION AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUSMarch 2023October 2025Allow3110NoNo
18178248TRANSISTORS HAVING DIFFERENT CHANNEL LENGTHS AND COMPARABLE SOURCE/DRAIN SPACESMarch 2023October 2025Allow3110YesNo
18172283LIGHT EMITTING DIODE PACKAGEFebruary 2023January 2024Allow1110NoNo
18170482FIELD EFFECT TRANSISTOR WITH ISOLATION STRUCTURE AND METHODFebruary 2023December 2025Allow3410NoNo
18167100MULTI-GATE DEVICES AND METHOD OF FABRICATING THE SAMEFebruary 2023January 2024Allow1110NoNo
18106106SEMICONDUCTOR DEVICEFebruary 2023July 2025Allow2910NoNo
18102812SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOFJanuary 2023February 2024Allow1210NoNo
18100688SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJanuary 2023October 2025Allow3310YesNo
18158263SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJanuary 2023December 2023Allow1110NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner SPALLA, DAVID C.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
7.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner SPALLA, DAVID C - Prosecution Strategy Guide

Executive Summary

Examiner SPALLA, DAVID C works in Art Unit 2893 and has examined 54 patent applications in our dataset. With an allowance rate of 100.0%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 35 months.

Allowance Patterns

Examiner SPALLA, DAVID C's allowance rate of 100.0% places them in the 97% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by SPALLA, DAVID C receive 1.50 office actions before reaching final disposition. This places the examiner in the 26% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by SPALLA, DAVID C is 35 months. This places the examiner in the 40% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.0% benefit to allowance rate for applications examined by SPALLA, DAVID C. This interview benefit is in the 15% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 40.6% of applications are subsequently allowed. This success rate is in the 92% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 56.2% of cases where such amendments are filed. This entry rate is in the 82% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 95% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 100.0% are granted (fully or in part). This grant rate is in the 92% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 11.1% of allowed cases (in the 90% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.