USPTO Examiner NGUYEN THANH T - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18774282SEMICONDUCTOR DEVICE HAVING A BACKSIDE METALLIZATION LAYER AND A PROTECTION LAYERJuly 2024January 2026Allow1820NoNo
18766279PASSIVATION STRUCTURE WITH INCREASED THICKNESS FOR METAL PADSJuly 2024November 2025Allow1620NoNo
18671619LIGHT EMITTING DIODEMay 2024March 2025Allow1010NoNo
18662615METHOD OF FORMING SOURCE/DRAIN EPITAXIAL STACKSMay 2024September 2025Allow1620NoNo
18652529METHODS FOR REGISTRATION OF CIRCUIT DIES AND ELECTRICAL INTERCONNECTSMay 2024November 2024Allow700NoNo
18650166MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHODApril 2024February 2025Allow1010NoNo
18614472SEMICONDUCTOR SUBSTRATE STRUCTURE AND METHOD OF MANUFACTURING THE SAMEMarch 2024January 2025Allow1010NoNo
18600146MEMORY DEVICES AND RELATED METHODS OF FORMING A MEMORY DEVICEMarch 2024November 2024Allow801NoNo
18433367LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2024January 2025Allow1210NoNo
18430140METHODS OF MANUFACTURING SEMICONDUCTOR CHIP INCLUDING CRACK PROPAGATION GUIDEFebruary 2024June 2025Allow1710NoNo
18428994Implantations for Forming Source/Drain Regions of Different TransistorsJanuary 2024May 2025Allow1510NoNo
18402018FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING THE SAMEJanuary 2024April 2025Allow1520NoNo
18397891MULTI-CHIP PACKAGINGDecember 2023August 2025Allow1920NoNo
18394178SUBSTRATE PROCESSING AND PACKAGINGDecember 2023January 2026Allow2421NoNo
18391463IC HAVING ELECTRICALLY ISOLATED WARPAGE PREVENTION STRUCTURESDecember 2023September 2025Allow2121NoNo
18535536Cu3Sn VIA METALLIZATION IN ELECTRICAL DEVICES FOR LOW-TEMPERATURE 3D-INTEGRATIONDecember 2023March 2025Allow1610YesNo
18515274PACKAGE STRUCTURE AND METHOD OF FORMING THE SAMENovember 2023October 2024Allow1101NoNo
18503681Enhanced Ignition in Inductively Coupled Plasmas For Workpiece ProcessingNovember 2023March 2025Allow1610NoNo
18383667METHOD TO IMPROVE PROFILE CONTROL DURING SELECTIVE ETCHING OF SILICON NITRIDE SPACERSOctober 2023October 2024Allow1210NoNo
18485709Structure and Method for Sealing a Silicon ICOctober 2023November 2024Allow1320NoNo
18378885SEMICONDUCTOR DEVICE WITH WIRE BOND AND METHOD FOR PREPARING THE SAMEOctober 2023May 2024Allow700NoNo
18483826RC-IGBT AND MANUFACTURING METHOD OF RC-IGBTOctober 2023March 2026Allow2901NoNo
18481975PACKAGE STRUCTUREOctober 2023May 2024Allow700NoNo
18374870SEMICONDUCTOR DEVICESeptember 2023February 2026Allow2800NoNo
18374925DOPANT-MODULATED ETCHING FOR MEMORY DEVICESSeptember 2023August 2025Allow2321NoNo
18460658STRESS REDUCTION STRUCTURES FOR A SEMICONDUCTOR DIE IN A COMPOSITE PACKAGE AND METHODS OF FORMING THE SAMESeptember 2023March 2026Allow3001NoNo
18239844Four-Terminal Resistance Testing StructureAugust 2023November 2025Allow2600NoNo
18237378METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEAugust 2023February 2026Allow2900NoNo
18230183SEMICONDUCTOR DEVICE WITH PROTECTION LAYER AND METHOD FOR FABRICATING THE SAMEAugust 2023January 2026Allow2910NoNo
18365009CAPACITOR BETWEEN TWO PASSIVATION LAYERS WITH DIFFERENT ETCHING RATESAugust 2023November 2024Allow1510NoNo
18362894SEMICONDUCTOR DEVICE AND PROCESS WITH CRACK REDUCTIONJuly 2023February 2026Allow3001NoNo
18362797IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC ADHESION AND PREVENTING METAL DIFFUSIONJuly 2023June 2024Allow1100NoNo
18228134COMPOSITE OXIDE SEMICONDUCTOR AND TRANSISTORJuly 2023May 2024Allow900NoNo
18360208SEMICONDUCTOR DEVICE WITH HYBRID ROUTING AND METHOD THEREFORJuly 2023February 2026Allow3101NoNo
18360694METHOD OF FORMING A HIGH ELECTRON MOBILITY TRANSISTORJuly 2023October 2024Allow1410NoNo
18359012SELF-ALIGNED INTERCONNECT STRUCTUREJuly 2023February 2025Allow1920NoNo
18224209INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAMEJuly 2023May 2025Allow2121YesNo
18347067WAFER BONDING ALIGNMENTJuly 2023December 2024Allow1700NoNo
18217223METHOD FOR LOW-COST, HIGH-BANDWIDTH MONOLITHIC SYSTEM INTEGRATION BEYOND RETICLE LIMITJune 2023June 2025Allow2321NoNo
18209486SEMICONDUCTOR DEVICEJune 2023March 2026Allow3310NoNo
18206598CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAMEJune 2023January 2026Allow3201NoNo
18329302Integrated Circuit Package and Method of Forming ThereofJune 2023September 2024Allow1510NoNo
18322462STRETCHABLE DISPLAY DEVICEMay 2023August 2024Allow1410NoNo
18144902SEMICONDUCTOR SUBSTRATE AND METHOD OF SAWING THE SAMEMay 2023April 2024Allow1110NoNo
18308036COMPOSITE PARTICULATES FOR USE AS PART OF A SUPPORTING FILL MIXTURE IN A SEMICONDUTOR SUBSTRATE STACKING APPLICATIONApril 2023August 2025Allow2800NoNo
18306137SYSTEMS AND METHODS FOR MITIGATING CRACK PROPAGATION IN SEMICONDUCTOR DIE MANUFACTURINGApril 2023February 2025Allow2220NoNo
18299786MANUFACTURING METHOD OF CHIPSApril 2023February 2026Allow3410YesNo
18128622SEMICONDUCTOR WAFER THINNED BY STEALTH LASINGMarch 2023November 2023Allow700NoNo
18127203CRACKSTOP STRUCTURESMarch 2023March 2025Allow2411YesNo
18184968INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAMEMarch 2023August 2025Allow2900NoNo
18179648WAFER-LEVEL-PACKAGE DEVICE WITH PERIPHERAL SIDE WALL PROTECTIONMarch 2023January 2026Allow3510NoNo
18175398METHODS OF FORMING A MICROELECTRONIC DEVICEFebruary 2023October 2023Allow800NoNo
18166922SEMICONDUCTOR DEVICE WITH A DIELECTRIC BETWEEN PORTIONSFebruary 2023August 2024Allow1820YesNo
18106028METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY FILLING GROOVES FORMED IN A FRONT SIDE SURFACE OF A WAFER WITH A SIDE FACE PROTECTION MATERIALFebruary 2023May 2024Allow1520NoNo
18164629LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2023September 2023Allow700NoNo
18163338METHOD OF FORMING PACKAGE STRUCTUREFebruary 2023January 2024Allow1110NoNo
18089559THREE-DIMENSIONAL MEMORY AND FABRICATION METHOD THEREOFDecember 2022January 2026Allow3701NoNo
18146222SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEDecember 2022August 2023Allow810NoNo
18063280Implantations for Forming Source/Drain Regions of Different TransistorsDecember 2022September 2023Allow1000NoNo
18061990SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEDecember 2022August 2023Allow800NoNo
17992911IMAGE SENSOR STRUCTURENovember 2022February 2026Allow3910NoNo
17990953MICRO LIGHT EMITTING DEVICE ARRAY AND METHOD OF MANUFACTURING THE SAMENovember 2022August 2024Allow2020YesNo
17976026LIGHT-EMITTING DEVICEOctober 2022January 2026Allow3910NoNo
17756325METHOD FOR MANUFACTURING A FUNCTIONAL CHIP SUITABLE FOR BEING ASSEMBLED TO WIRE ELEMENTSOctober 2022December 2024Allow3100NoNo
18049328DICING METHODOctober 2022October 2025Allow3610NoNo
17920484SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEOctober 2022January 2026Allow3911NoNo
18047739PROCESSING METHODOctober 2022October 2025Allow3610NoNo
17966687ELECTRONIC DEVICEOctober 2022August 2024Allow2220NoNo
17964528VERTICAL-STRUCTURE FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOROctober 2022September 2025Allow3511NoNo
17961056SEMICONDUCTOR DEVICE INCLUDING VIA STRUCTUREOctober 2022March 2025Allow3010YesNo
17950154DISPLAY DEVICE, EYEGLASSES, CAMERA, AND METHOD OF MANUFACTURING DISPLAY DEVICESeptember 2022November 2025Allow3811NoNo
17945631METHOD TO IMPROVE PROFILE CONTROL DURING SELECTIVE ETCHING OF SILICON NITRIDE SPACERSSeptember 2022July 2023Allow1000NoNo
17944596METHODS FOR FORMING METAL GAPFILL WITH LOW RESISTIVITYSeptember 2022December 2024Allow2700NoNo
17944361DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICESeptember 2022March 2025Allow3000NoNo
17931940Type of bumpless and wireless semiconductor deviceSeptember 2022March 2026Allow4221YesNo
17944678SEMICONDUCTOR DEVICESeptember 2022June 2025Allow3310NoNo
17930544METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF FORMING PATTERNSeptember 2022March 2025Allow3000NoNo
17901280LIGHT EMITTING DIODE DEVICES WITH BONDING AND/OR OHMIC CONTACT-REFLECTIVE MATERIALSeptember 2022October 2025Allow3711NoNo
17821556METHOD OF PROCESSING MONOCRYSTALLINE SILICON WAFERAugust 2022March 2025Allow3000NoNo
17821616METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR CHIPAugust 2022December 2025Allow3911YesNo
17892166ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOFAugust 2022September 2025Allow3611YesNo
178917773D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE WITH RMG INNER SPACER PROTECTING LOWER WORK-FUNCTION METAL LAYERAugust 2022October 2025Allow3811YesNo
17820838PACKAGE SUBSTRATE, PACKAGE SUBSTRATE PROCESSING METHOD, AND PACKAGED CHIPAugust 2022May 2025Allow3301NoNo
17890080SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFAugust 2022April 2025Allow3201NoNo
17888467SUPPORT STRUCTURE FOR MULTIPLE, ALTERNATING EPITAXIAL SILICONAugust 2022March 2026Allow4311YesNo
17819004DEVICES INCLUDING STAIR STEP STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMSAugust 2022June 2024Allow2200NoNo
17886077WAFER, ELECTRONIC COMPONENT AND METHOD USING LASER PENETRATION AFFECTING STRUCTUREAugust 2022January 2026Allow4111NoNo
17818736Passivation Structure With Increased Thickness for Metal PadsAugust 2022April 2024Allow2010NoNo
17884286WARPAGE CONTROL OF SEMICONDUCTOR DIEAugust 2022February 2024Allow1810NoNo
17797189METAL OXIDE, METHOD FOR FORMING METAL OXIDE, AND SEMICONDUCTOR DEVICEAugust 2022October 2025Allow3810YesNo
17876255METHOD OF FORMING SOURCE/DRAIN EPITAXIAL STACKSJuly 2022October 2023Allow1410NoNo
17875533MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHODJuly 2022February 2024Allow1810NoNo
17868946SELF-ALIGNED INTERCONNECT STRUCTUREJuly 2022June 2023Allow1100NoNo
17865705DIE CORNER PROTECTION BY USING POLYMER DEPOSITION TECHNOLOGYJuly 2022March 2024Allow2020NoNo
17864038SEMICONDUCTOR DEVICE AND BUMP ARRANGEMENT METHODJuly 2022December 2025Abandon4111NoNo
17864325HIGH ELECTRON MOBILITY TRANSISTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2022June 2025Allow3511NoNo
17856039SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEJuly 2022January 2024Abandon1810NoNo
17845971SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING SEMICONDUCTOR STRUCTUREJune 2022June 2025Allow3611NoNo
17841526DEEP TRENCH PROTECTIONJune 2022June 2025Allow3650NoNo
17827198Enhanced Ignition in Inductively Coupled Plasmas For Workpiece ProcessingMay 2022August 2023Allow1410NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NGUYEN, THANH T.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
17
Examiner Affirmed
10
(58.8%)
Examiner Reversed
7
(41.2%)
Reversal Percentile
63.9%
Higher than average

What This Means

With a 41.2% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
53
Allowed After Appeal Filing
14
(26.4%)
Not Allowed After Appeal Filing
39
(73.6%)
Filing Benefit Percentile
38.4%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 26.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner NGUYEN, THANH T - Prosecution Strategy Guide

Executive Summary

Examiner NGUYEN, THANH T works in Art Unit 2893 and has examined 1,065 patent applications in our dataset. With an allowance rate of 83.2%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 24 months.

Allowance Patterns

Examiner NGUYEN, THANH T's allowance rate of 83.2% places them in the 57% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by NGUYEN, THANH T receive 1.67 office actions before reaching final disposition. This places the examiner in the 34% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NGUYEN, THANH T is 24 months. This places the examiner in the 84% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +8.5% benefit to allowance rate for applications examined by NGUYEN, THANH T. This interview benefit is in the 39% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 26.9% of applications are subsequently allowed. This success rate is in the 45% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 32.8% of cases where such amendments are filed. This entry rate is in the 48% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 80.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 63% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 63.8% of appeals filed. This is in the 44% percentile among all examiners. Of these withdrawals, 33.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 49.4% are granted (fully or in part). This grant rate is in the 45% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 5.6% of allowed cases (in the 87% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.5% of allowed cases (in the 71% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.