USPTO Examiner GUPTA RAJ R - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18908950STRUCTURES WITH DEEP TRENCH ISOLATION REGIONS FOR A HIGH-VOLTAGE FIELD-EFFECT TRANSISTOROctober 2024February 2025Allow510NoNo
18765489INDUCTORS WITH AIRGAP ELECTRICAL ISOLATIONJuly 2024October 2024Allow410NoNo
18622091DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2024June 2025Allow1500NoNo
18618750SILICON-ON-INSULATOR METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (SOI MOSFET) STRUCTUREMarch 2024May 2024Allow200NoNo
18409785SEMICONDUCTOR DEVICEJanuary 2024December 2024Allow1101NoNo
18405621LATERAL BIPOLAR TRANSISTOR WITH GATED COLLECTORJanuary 2024February 2025Allow1401NoNo
18528057TRANSISTOR DEVICE WITH BUFFERED DRAINDecember 2023March 2025Allow1611NoNo
18518797SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMENovember 2023September 2024Allow1000NoNo
18511984SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMENovember 2023December 2024Allow1310NoNo
18511974SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMENovember 2023February 2025Allow1520NoNo
18488337SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOFOctober 2023April 2025Allow1811NoNo
18472199LDMOS TRANSISTOR AND METHOD OF FORMING THE SAMESeptember 2023May 2025Allow2011NoNo
18232736DEVICE INCLUDING MIM CAPACITOR AND RESISTORAugust 2023September 2024Allow1400NoNo
18230968EUV PHOTO MASKS AND MANUFACTURING METHOD THEREOFAugust 2023May 2025Allow2111NoNo
18229661SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEAugust 2023January 2025Allow1820NoNo
18360168INTEGRATED CIRCUIT STRUCTURE AND METHOD WITH SOLID PHASE DIFFUSIONJuly 2023September 2024Allow1401NoNo
18356672STACKED SUBSTRATE STRUCTURE WITH INTER-TIER INTERCONNECTIONJuly 2023April 2025Allow2111NoNo
18354388METHOD OF PATTERNING A SUBSTRATE USING A SIDEWALL SPACER ETCH MASKJuly 2023June 2024Allow1100NoNo
18216285Light-Emitting Element, Light-Emitting Device, Electronic Appliance, and Lighting DeviceJune 2023August 2024Allow1400NoNo
18338736SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN CONTACTJune 2023December 2024Allow1820NoNo
18334421METHOD AND SYSTEM FOR REGULATING PLASMA DICING RATESJune 2023July 2024Allow1310YesNo
18315602ORGANIC LIGHT EMITTING DISPLAY DEVICEMay 2023March 2024Allow1000NoNo
18139960MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICEApril 2023June 2024Allow1410NoNo
18139964HIGH VOLTAGE SEMICONDUCTOR DEVICEApril 2023October 2024Allow1820YesNo
18307914NEGATIVE DIFFERENTIAL RESISTANCE DEVICEApril 2023September 2024Allow1701NoNo
18171502FIELD EFFECT TRANSISTOR INCLUDING GATE INSULATING LAYER FORMED OF TWO-DIMENSIONAL MATERIALFebruary 2023November 2024Allow2121YesNo
18100924MONOLITHIC LED ARRAY AND A PRECURSOR THERETOJanuary 2023March 2024Allow1411YesNo
18052205HIGH-VOLTAGE DEVICES INTEGRATED ON SEMICONDUCTOR-ON-INSULATOR SUBSTRATENovember 2022January 2024Allow1511NoNo
17903149SYNAPTIC DEVICESeptember 2022August 2024Allow2321NoNo
17898836SILICON-ON-INSULATOR (SOI) DEVICE HAVING VARIABLE THICKNESS DEVICE LAYER AND CORRESPONDING METHOD OF PRODUCTIONAugust 2022February 2025Allow3001NoNo
17883160DISPLAY DEVICEAugust 2022January 2024Allow1721YesNo
17871045QUANTUM DEVICES FORMED FROM A SINGLE SUPERCONDUCTING WIRE HAVING A CONFIGURABLE GROUND CONNECTIONJuly 2022March 2025Allow3211YesNo
17858660MICROFLUIDIC CHANNELS SEALED WITH DIRECTIONALLY-GROWN PLUGSJuly 2022April 2024Allow2111NoNo
17848702SEMICONDUCTOR DEVICE MANUFACTURING METHODJune 2022June 2025Allow3600NoNo
17827805SEMICONDUCTOR EPITAXY STRUCTUREMay 2022May 2024Allow2311NoNo
17664989SEMICONDUCTOR DEVICEMay 2022June 2025Allow3720NoNo
17745304ENHANCED CAPACITOR FOR INTEGRATION WITH METAL-OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTORMay 2022January 2025Allow3201NoNo
17732211THREE-DIMENSIONAL TRANSISTOR DEVICE HAVING CONFORMAL LAYERApril 2022May 2025Allow3631NoNo
17706864TRANSISTORS HAVING SELF-ALIGNED BODY TIEMarch 2022April 2025Allow3631NoNo
17699783ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2022November 2023Allow2001NoNo
17655712SEMICONDUCTOR DEVICE AND MANUFACTURING METHODS THEREOFMarch 2022May 2025Allow3811YesNo
17696700CMOS IMAGE SENSORMarch 2022May 2025Allow3810YesNo
17683040SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHODFebruary 2022May 2025Allow3911NoNo
17682370REDUCING TRANSISTOR BREAKDOWN IN A POWER FET CURRENT SENSE STACKFebruary 2022April 2025Allow3721NoYes
17582159LDMOS HAVING MULTIPLE FIELD PLATES AND ASSOCIATED MANUFACTURING METHODJanuary 2022January 2024Allow2401NoNo
17575224SEMICONDUCTOR DEVICE WITH HIGH-RESISTANCE POLYSILICON RESISTOR FORMATION METHODJanuary 2022September 2024Allow3210NoNo
17569527SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022May 2024Allow2811NoNo
17547707High Voltage Device, High Voltage Control Device and Manufacturing Methods ThereofDecember 2021May 2024Abandon2941NoNo
17538238Power Transistor IC with ThermopileNovember 2021January 2024Allow2511NoNo
17515546HIGH DIELECTRIC CONSTANT METAL GATE MOS TRANSISTOROctober 2021May 2024Abandon3020YesNo
17282954MEMORY DEVICE COMPRISING BIOCOMPATIBLE POLYMER NANOPARTICLES, AND MANUFACTURING METHOD THEREFOROctober 2021May 2025Allow4920NoNo
17491726METHOD AND DEVICE FOR STORING FREE ATOMS, MOLECULES AND IONS IN A CONTACT-LESS, ALBEIT WELL-DEFINED NEAR SURFACE ARRANGEMENTOctober 2021March 2024Allow2920NoNo
17402897Metal Line Structure and MethodAugust 2021March 2024Allow3100NoNo
17350384BILAYER METAL DICHALCOGENIDES, SYNTHESES THEREOF, AND USES THEREOFJune 2021January 2024Abandon3131YesNo
17331437SEMICONDUCTOR DEVICE WITH PASSIVE MAGNETO-ELECTRIC TRANSDUCERMay 2021March 2024Allow3440NoNo
17290489BIDIRECTIONAL SWITCH, ELECTRICAL DEVICE, AND MULTI-LEVEL INVERTERApril 2021June 2024Allow3810NoNo
17285633FILM STRUCTURE, ELEMENT, AND MULTILEVEL ELEMENTApril 2021January 2024Allow3330NoNo
17271619LIGHT-EMITTING DIODE DEVICE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY PANEL AND DISPLAY APPARATUSFebruary 2021March 2024Allow3710NoNo
17271013DISPLAY PANEL, MASK, MASK ASSEMBLY, AND METHOD OF MANUFACTURING MASK ASSEMBLYFebruary 2021December 2024Allow4611NoNo
17268738JIG FOR TACK WELDING OF BATTERY CELL ELECTRODE LEADFebruary 2021August 2024Allow4210YesNo
17140595METHOD OF USING A PROCESSING APPARATUSJanuary 2021April 2024Allow3910YesNo
15734303ENCAPSULATION FILMDecember 2020May 2025Allow5440NoNo
17055206DISPLAY DEVICENovember 2020August 2023Allow3340YesNo
17073967Semiconductor Device and Manufacturing MethodOctober 2020February 2025Abandon5261NoNo
17042581CIRCUIT ARRANGEMENT HAVING A SPACER ELEMENT, CONVERTER AND AIRCRAFT WITH SUCH A CIRCUIT ARRANGEMENT, AND METHOD FOR CURRENT MEASUREMENTSeptember 2020April 2024Abandon4210NoNo
17041884LAMINATED GLASS STRUCTURES FOR ELECTRONIC DEVICES AND ELECTRONIC DEVICE SUBSTRATESSeptember 2020March 2024Allow4110NoNo
17007032SEMICONDUCTOR DEVICEAugust 2020May 2024Abandon4441YesYes
16228364GALLIUM NITRIDE DEVICES INCLUDING A TUNNEL BARRIER LAYERDecember 2018December 2024Abandon6041NoYes
15960564METHOD FOR MANUFACTURING TFT SUBSTRATE AND STRUCTURE THEREOFApril 2018August 2019Allow1611NoNo
15758812LIGHT-CONVERTING MATERIALMarch 2018December 2019Allow2120YesNo
15756969ORGANIC LIGHT-EMITTING DIODE AND VEHICLE EXTERIOR LIGHTINGMarch 2018April 2019Allow1410NoNo
15582334PATTERNING OF VERTICAL NANOWIRE TRANSISTOR CHANNEL AND GATE WITH DIRECTED SELF ASSEMBLYApril 2017February 2019Allow2101NoNo
15518346PIXEL STRUCTURE, ARRAY SUBSTRATE AND DISPLAY APPARATUSApril 2017May 2019Allow2510NoNo
15350213MANUFACTURING METHOD OF SEMICONDUCTOR DEVICENovember 2016July 2017Allow810YesNo
15296432SEMICONDUCTOR DEVICEOctober 2016March 2017Allow500NoNo
15261343HIGH QUALITY ELECTRICAL CONTACTS BETWEEN INTEGRATED CIRCUIT CHIPSSeptember 2016March 2017Allow600YesNo
15147245SPLIT FIN FIELD EFFECT TRANSISTOR ENABLING BACK BIAS ON FIN TYPE FIELD EFFECT TRANSISTORSMay 2016June 2017Allow1401NoNo
14972833ARRANGEMENT AND METHOD FOR CONTROLLING ELECTRONICALLY CONTROLLABLE DEVICES AND SYSTEMS IN PUBLIC AND PRIVATE BUILDINGSDecember 2015February 2019Allow3820NoNo
14964915HEIGHT-ADJUSTABLE TABLE USING EYE DETECTIONDecember 2015July 2018Allow3110NoNo
14892318THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAMENovember 2015December 2018Allow3730NoNo
14827921APPARATUS AND METHOD FOR MANAGING DEVICESAugust 2015April 2019Allow4330NoNo
14632104SEMICONDUCTOR DEVICEFebruary 2015July 2017Allow2811YesNo
14630272Heading Sensor for Deflector Angle of Attack EstimationFebruary 2015October 2017Allow3210YesNo
14524650METHOD FOR FORMING METAL SEMICONDUCTOR ALLOYS IN CONTACT HOLES AND TRENCHESOctober 2014September 2016Allow2311NoNo
14483923METHOD FOR FORMING METAL SEMICONDUCTOR ALLOYS IN CONTACT HOLES AND TRENCHESSeptember 2014May 2016Allow2011NoNo
14278737PACKAGE-ON-PACKAGE ASSEMBLY AND METHODMay 2014February 2015Allow910NoNo
14193597Semiconductor Device and Manufacturing Method ThereofFebruary 2014April 2015Allow1400YesNo
14127935ARRAY SUBSTRATE, MANUFACTURING METHOD, AND DISPLAY DEVICE THEREOFDecember 2013October 2014Allow1000YesNo
14096325FACILITATING CHIP DICING FOR METAL-METAL BONDING AND HYBRID WAFER BONDINGDecember 2013March 2015Allow1601YesNo
14091107LIGHT EMITTING DEVICE AND DISPLAY COMPRISING A PLURALITY OF LIGHT EMITTING COMPONENTS ON MOUNTNovember 2013April 2015Allow1720YesNo
13555468SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2012October 2013Allow1510YesNo
13434360SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEMarch 2012September 2016Allow5490YesNo
13351139SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2012August 2015Allow4321YesNo
13340436MULTI CHIP PACKAGEDecember 2011November 2014Allow3510NoNo
13264444MULTI-JUNCTION PHOTOVOLTAIC CELL WITH NANOWIRESOctober 2011October 2014Allow3600YesNo
13264509SEMICONDUCTOR DEVICES GROWN ON INDIUM-CONTAINING SUBSTRATES UTILIZING INDIUM DEPLETION MECHANISMSOctober 2011December 2014Allow3810YesNo
13174952SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJuly 2011October 2012Allow1501YesNo
13099119SEMICONDUCTOR DEVICE WITH LOW ON RESISTANCEMay 2011October 2014Allow4131NoNo
13085115ZIRCONIUM AND HAFNIUM BORIDE ALLOY TEMPLATES ON SILICON FOR NITRIDE INTEGRATION APPLICATIONSApril 2011July 2013Allow2710YesNo
13013063SEMICONDUCTOR SUBSTRATE WITH STRIPES OF DIFFERENT CRYSTAL PLANE DIRECTIONS AND SEMICONDUCTOR DEVICE INCLUDING THE SAMEJanuary 2011March 2013Allow2621YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner GUPTA, RAJ R.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
2
Examiner Affirmed
1
(50.0%)
Examiner Reversed
1
(50.0%)
Reversal Percentile
75.7%
Higher than average

What This Means

With a 50.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
6
Allowed After Appeal Filing
2
(33.3%)
Not Allowed After Appeal Filing
4
(66.7%)
Filing Benefit Percentile
50.9%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 33.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner GUPTA, RAJ R - Prosecution Strategy Guide

Executive Summary

Examiner GUPTA, RAJ R works in Art Unit 2893 and has examined 134 patent applications in our dataset. With an allowance rate of 94.0%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 33 months.

Allowance Patterns

Examiner GUPTA, RAJ R's allowance rate of 94.0% places them in the 83% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by GUPTA, RAJ R receive 1.70 office actions before reaching final disposition. This places the examiner in the 49% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by GUPTA, RAJ R is 33 months. This places the examiner in the 28% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.5% benefit to allowance rate for applications examined by GUPTA, RAJ R. This interview benefit is in the 13% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 30.8% of applications are subsequently allowed. This success rate is in the 53% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 20.5% of cases where such amendments are filed. This entry rate is in the 18% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 100.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 73% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 66.7% of appeals filed. This is in the 45% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 80.0% are granted (fully or in part). This grant rate is in the 92% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 3.7% of allowed cases (in the 85% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.