Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18929113 | VERTICAL MEMORY DEVICES | October 2024 | October 2025 | Allow | 12 | 0 | 0 | No | No |
| 18922192 | SEMICONDUCTOR DIE ASSEMBLIES WITH DECOMPOSABLE MATERIALS AND ASSOCIATED METHODS AND SYSTEMS | October 2024 | October 2025 | Allow | 12 | 0 | 0 | No | No |
| 18788822 | WIRE BONDING METHOD AND APPARATUS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING | July 2024 | October 2025 | Allow | 14 | 0 | 0 | No | No |
| 18766974 | ECCENTRIC VIA STRUCTURES FOR STRESS REDUCTION | July 2024 | January 2025 | Allow | 7 | 0 | 0 | No | No |
| 18745613 | Semiconductor Package and Method | June 2024 | February 2025 | Allow | 8 | 0 | 0 | No | No |
| 18740503 | PACKAGE STRUCTURE | June 2024 | May 2025 | Allow | 11 | 1 | 0 | No | No |
| 18664483 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME | May 2024 | December 2024 | Allow | 8 | 0 | 0 | No | No |
| 18646951 | SEMICONDUCTOR PACKAGE | April 2024 | March 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18644068 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | April 2024 | April 2025 | Allow | 12 | 1 | 0 | No | No |
| 18643144 | SEMICONDUCTOR PACKAGE | April 2024 | March 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18628804 | INTERPOSER WITH WARPAGE-RELIEF TRENCHES | April 2024 | November 2024 | Allow | 7 | 0 | 0 | No | No |
| 18623010 | SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF MANUFACTURING THE SAME | March 2024 | November 2024 | Allow | 7 | 0 | 0 | No | No |
| 18618259 | SIGNAL ISOLATOR HAVING ENHANCED CREEPAGE CHARACTERISTICS | March 2024 | October 2024 | Allow | 7 | 0 | 0 | No | No |
| 18610185 | ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | March 2024 | September 2024 | Allow | 6 | 0 | 0 | No | No |
| 18596461 | SEMICONDUCTOR DEVICES INCLUDING PROTRUDING INSULATION PORTIONS BETWEEN ACTIVE FINS | March 2024 | February 2025 | Allow | 11 | 1 | 0 | No | No |
| 18442062 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES | February 2024 | February 2025 | Allow | 12 | 0 | 0 | No | No |
| 18436643 | Honeycomb Pattern for Conductive Features | February 2024 | September 2024 | Allow | 7 | 0 | 0 | No | No |
| 18416180 | OVERLAPPING DIE STACKS FOR NAND PACKAGE ARCHITECTURE | January 2024 | June 2025 | Allow | 17 | 2 | 0 | No | No |
| 18403545 | MICROELECTRONIC ASSEMBLIES | January 2024 | September 2024 | Allow | 8 | 0 | 0 | No | No |
| 18397873 | MICROELECTRONIC ASSEMBLIES | December 2023 | February 2025 | Allow | 14 | 1 | 0 | No | No |
| 18533441 | ELECTRONIC DEVICE | December 2023 | March 2026 | Allow | 27 | 0 | 0 | No | No |
| 18528322 | SEMICONDUCTOR PACKAGE | December 2023 | January 2025 | Allow | 13 | 1 | 0 | Yes | No |
| 18566907 | METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE | December 2023 | February 2026 | Allow | 26 | 0 | 0 | No | No |
| 18509043 | MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE WITH EFFICIENT EDGE STRUCTURE | November 2023 | January 2025 | Allow | 15 | 1 | 0 | No | No |
| 18507908 | SEMICONDUCTOR DIE ASSEMBLIES WITH DECOMPOSABLE MATERIALS AND ASSOCIATED METHODS AND SYSTEMS | November 2023 | June 2024 | Allow | 7 | 0 | 0 | No | No |
| 18503430 | VERTICAL MEMORY DEVICES | November 2023 | August 2024 | Allow | 9 | 0 | 0 | No | No |
| 18498621 | DISPLAY PANEL AND PREPARATION METHOD OF DISPLAY PANEL | October 2023 | January 2026 | Allow | 27 | 0 | 0 | No | No |
| 18385167 | DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FOR FORMING A DIE INTERCONNECT SUBSTRATE | October 2023 | October 2024 | Allow | 11 | 1 | 0 | No | No |
| 18492402 | PACKAGE COMPRISING INTEGRATED DEVICES AND BRIDGE COUPLING TOP SIDES OF INTEGRATED DEVICES | October 2023 | June 2025 | Allow | 20 | 3 | 1 | No | No |
| 18492343 | SEMICONDUCTOR DEVICE | October 2023 | June 2024 | Allow | 7 | 0 | 0 | No | No |
| 18490172 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE | October 2023 | June 2024 | Allow | 8 | 0 | 0 | No | No |
| 18489814 | SEMICONDUCTOR PACKAGE STRUCTURE | October 2023 | June 2025 | Allow | 20 | 3 | 0 | No | No |
| 18377706 | WIRE BONDING METHOD AND APPARATUS FOR ELECTROMAGNETIC INTERFERENCE SHIELDING | October 2023 | April 2024 | Allow | 7 | 0 | 0 | No | No |
| 18241592 | FACE-TO-FACE SEMICONDUCTOR DEVICE WITH FAN-OUT PORCH | September 2023 | March 2024 | Allow | 7 | 0 | 0 | No | No |
| 18236965 | DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICE | August 2023 | February 2026 | Allow | 30 | 0 | 0 | No | No |
| 18236930 | PACKAGE STRUCTURE AND TESTING METHOD | August 2023 | September 2024 | Allow | 13 | 0 | 0 | No | No |
| 18448957 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | August 2023 | October 2025 | Allow | 26 | 0 | 0 | No | No |
| 18232617 | SEMICONDUCTOR PACKAGE | August 2023 | October 2025 | Allow | 26 | 0 | 0 | No | No |
| 18229670 | SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME | August 2023 | August 2024 | Allow | 12 | 1 | 0 | No | No |
| 18362918 | CONTROLLING ADHESIVE REFLOW FOR TRANSFER PRINTING | July 2023 | March 2026 | Allow | 31 | 0 | 0 | No | No |
| 18359923 | CHIP PACKAGE STRUCTURE WITH CAVITY IN INTERPOSER | July 2023 | June 2024 | Allow | 11 | 1 | 0 | No | No |
| 18359902 | PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME | July 2023 | March 2024 | Allow | 8 | 0 | 0 | No | No |
| 18358264 | MEMORY DEVICE AND MANUFACTURING METHOD THEREOF | July 2023 | January 2025 | Allow | 18 | 2 | 1 | Yes | No |
| 18354670 | FIN FIELD EFFECT TRANSISTOR HAVING AIRGAP AND METHOD FOR MANUFACTURING THE SAME | July 2023 | August 2024 | Allow | 12 | 1 | 0 | Yes | No |
| 18353308 | ETCH METHOD FOR OPENING A SOURCE LINE IN FLASH MEMORY | July 2023 | September 2024 | Allow | 14 | 2 | 0 | No | No |
| 18351777 | SEMICONDUCTOR DEVICE AND POWER MANAGEMENT IC | July 2023 | February 2024 | Allow | 8 | 0 | 0 | No | No |
| 18344418 | INTERCONNECTION BETWEEN CHIPS BY BRIDGE CHIP | June 2023 | June 2024 | Allow | 12 | 1 | 0 | No | No |
| 18344456 | INTEGRATED CIRCUIT PACKAGES | June 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18336067 | SEMICONDUCTOR PACKAGE | June 2023 | August 2024 | Allow | 14 | 1 | 1 | No | No |
| 18335302 | HYBRID UNDERFILL STRUCTURES FOR MULTI-DIE PACKAGES AND METHODS OF FORMING THE SAME | June 2023 | March 2026 | Allow | 33 | 1 | 0 | No | No |
| 18209500 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | June 2023 | September 2025 | Allow | 27 | 0 | 0 | No | No |
| 18334434 | ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF | June 2023 | September 2025 | Allow | 27 | 0 | 0 | No | No |
| 18326325 | SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE | May 2023 | February 2024 | Allow | 8 | 0 | 0 | No | No |
| 18203631 | PACKAGE-ON-PACKAGE HAVING A THICK LOGIC DIE | May 2023 | February 2026 | Allow | 32 | 1 | 0 | Yes | No |
| 18324989 | PACKAGE STRUCTURE INCLUDING GUIDING PATTERNS | May 2023 | December 2025 | Allow | 30 | 1 | 0 | Yes | No |
| 18202375 | SEMICONDUCTOR PACKAGE | May 2023 | September 2025 | Allow | 28 | 0 | 0 | No | No |
| 18322735 | INTERPOSER WITH BUILT-IN WIRING FOR TESTING AN EMBEDDED INTEGRATED PASSIVE DEVICE AND METHODS FOR FORMING THE SAME | May 2023 | October 2025 | Allow | 29 | 0 | 0 | No | No |
| 18201319 | SEMICONDUCTOR STRUCTURE AND METHOD FOR ARRANGING REDISTRIBUTION LAYER OF SEMICONDUCTOR DEVICE | May 2023 | December 2025 | Allow | 30 | 1 | 0 | No | No |
| 18321739 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | May 2023 | January 2024 | Allow | 8 | 0 | 0 | No | No |
| 18200230 | RADIO FREQUENCY FRONT-END MODULE, MANUFACTURING METHOD THEREOF AND COMMUNICATION DEVICE | May 2023 | February 2024 | Allow | 9 | 1 | 1 | No | No |
| 18317319 | METHOD FOR EPITAXIAL GROWTH AND DEVICE | May 2023 | January 2024 | Allow | 8 | 0 | 0 | No | No |
| 18139141 | SUBSTRATE STRUCTURE, AND FABRICATION AND PACKAGING METHODS THEREOF | April 2023 | February 2025 | Allow | 22 | 3 | 0 | Yes | No |
| 18138137 | MAGNETIC TUNNEL JUNCTION (MTJ) DEVICE AND MANUFACTURING METHOD THEREOF | April 2023 | February 2024 | Allow | 10 | 1 | 0 | No | No |
| 18132989 | SEMICONDUCTOR DEVICE | April 2023 | May 2024 | Allow | 13 | 3 | 0 | No | No |
| 18132992 | SEMICONDUCTOR DEVICE | April 2023 | May 2024 | Allow | 13 | 3 | 0 | No | No |
| 18194876 | Underfill Structure for Semiconductor Packages and Methods of Forming the Same | April 2023 | April 2024 | Allow | 13 | 1 | 0 | No | No |
| 18185507 | METHODS OF FABRICATING PLANAR INFRARED PHOTODETECTORS | March 2023 | May 2024 | Allow | 14 | 1 | 0 | No | No |
| 18121769 | FAN-OUT PACKAGING DEVICE USING BRIDGE AND METHOD OF MANUFACTURING FAN-OUT PACKAGING DEVICE USING BRIDGE | March 2023 | December 2025 | Allow | 33 | 1 | 0 | No | No |
| 18119784 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME | March 2023 | December 2025 | Allow | 33 | 1 | 0 | No | No |
| 18165419 | SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS | February 2023 | May 2025 | Allow | 28 | 0 | 0 | No | No |
| 18060573 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | December 2022 | November 2025 | Allow | 36 | 1 | 0 | No | No |
| 17981535 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME | November 2022 | January 2026 | Allow | 38 | 1 | 0 | Yes | No |
| 18050705 | SEMICONDUCTOR PACKAGE | October 2022 | July 2025 | Allow | 32 | 0 | 0 | No | No |
| 17976409 | METHODS AND APPARATUS FOR USING SPACER-ON-SPACER DESIGN FOR SOLDER JOINT RELIABILITY IMPROVEMENT IN SEMICONDUCTOR DEVICES | October 2022 | March 2025 | Allow | 29 | 0 | 0 | No | No |
| 17975692 | SEMICONDUCTOR PACKAGE | October 2022 | August 2025 | Allow | 33 | 0 | 0 | No | No |
| 17975455 | ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF | October 2022 | August 2025 | Allow | 33 | 0 | 0 | No | No |
| 18049428 | SEMICONDUCTOR PACKAGE INCLUDING UNDERFILL AND METHOD OF FORMING THE SAME | October 2022 | July 2025 | Allow | 33 | 1 | 0 | No | No |
| 17956566 | ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF | September 2022 | June 2025 | Allow | 33 | 1 | 0 | No | No |
| 17955760 | Dual Die Integrated Circuit System in an Integrated Circuit Package with two Separate Supply Domains | September 2022 | March 2025 | Allow | 30 | 0 | 0 | No | No |
| 17934135 | SEMICONDUCTOR DEVICE | September 2022 | July 2025 | Allow | 34 | 1 | 0 | No | No |
| 17942984 | SEMICONDUCTOR PACKAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME | September 2022 | November 2024 | Allow | 26 | 1 | 0 | No | No |
| 17942149 | MULTICHIP INTERCONNECT PACKAGE | September 2022 | July 2025 | Allow | 34 | 1 | 0 | No | No |
| 17903209 | SEMICONDUCTOR PACKAGE | September 2022 | March 2025 | Allow | 31 | 0 | 0 | No | No |
| 17899522 | SUBSTRATES WITH SPACERS, INCLUDING SUBSTRATES WITH SOLDER RESIST SPACERS, AND ASSOCIATED DEVICES, SYSTEMS, AND METHODS | August 2022 | July 2025 | Allow | 35 | 1 | 0 | No | No |
| 17897156 | MODULAR SYSTEMS IN PACKAGES, AND ASSOCIATED DEVICES, SYSTEMS, AND METHODS | August 2022 | March 2026 | Allow | 43 | 2 | 0 | No | No |
| 17892821 | Semiconductor Device and Method Forming Same | August 2022 | December 2025 | Allow | 39 | 1 | 1 | No | No |
| 17891665 | TEMPLATE STRUCTURE FOR QUASI-MONOLITHIC DIE ARCHITECTURES | August 2022 | October 2025 | Allow | 38 | 0 | 0 | No | No |
| 17890834 | SPACERS FOR SEMICONDUCTOR DEVICE ASSEMBLIES | August 2022 | May 2025 | Allow | 33 | 1 | 0 | No | No |
| 17890592 | SEMICONDUCTOR DEVICE WITH A POROUS AIR VENT | August 2022 | March 2025 | Allow | 31 | 0 | 0 | No | No |
| 17890210 | SEMICONDUCTOR DEVICE | August 2022 | September 2025 | Allow | 37 | 1 | 1 | No | No |
| 17889238 | CONFORMABLE DIE BOND FILM (DBF) IN GLASS CAVITY | August 2022 | January 2026 | Allow | 41 | 1 | 0 | No | No |
| 17889163 | PACKAGE COMPRISING A FIRST SUBSTRATE, A SECOND SUBSTRATE AND AN ELECTRICAL DEVICE COUPLED TO A BOTTOM SURFACE OF THE SECOND SUBSTRATE | August 2022 | October 2025 | Allow | 38 | 2 | 0 | No | No |
| 17888293 | CHIP PACKAGE WITH CORE EMBEDDED INTEGRATED DEVICES | August 2022 | July 2025 | Allow | 35 | 1 | 0 | Yes | No |
| 17879308 | UNDER CHIP BRIDGE | August 2022 | May 2025 | Allow | 34 | 1 | 1 | No | No |
| 17862040 | SEMICONDUCTOR PACKAGE INCLUDING PACKAGE SUBSTRATE WITH DUMMY VIA AND METHOD OF FORMING THE SAME | July 2022 | February 2025 | Allow | 31 | 0 | 0 | No | No |
| 17858286 | SEMICONDUCTOR EMI SHIELDING COMPONENT, SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | July 2022 | March 2025 | Allow | 32 | 0 | 0 | No | No |
| 17854613 | MICROELECTRONIC ASSEMBLIES INCLUDING STACKED DIES COUPLED BY A THROUGH DIELECTRIC VIA | June 2022 | September 2025 | Allow | 39 | 0 | 0 | No | No |
| 17784541 | DISPLAY AND ELECTRONIC DEVICE | June 2022 | March 2026 | Allow | 45 | 1 | 0 | No | No |
| 17831492 | DISPLAY APPARATUS | June 2022 | August 2025 | Allow | 38 | 0 | 0 | No | No |
| 17804971 | Work-Function Layers in the Gates of pFETs | June 2022 | June 2025 | Allow | 37 | 1 | 1 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner FERNANDES, ERROL V.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 25.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner FERNANDES, ERROL V works in Art Unit 2893 and has examined 133 patent applications in our dataset. With an allowance rate of 97.7%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 31 months.
Examiner FERNANDES, ERROL V's allowance rate of 97.7% places them in the 89% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by FERNANDES, ERROL V receive 1.41 office actions before reaching final disposition. This places the examiner in the 22% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.
The median time to disposition (half-life) for applications examined by FERNANDES, ERROL V is 31 months. This places the examiner in the 56% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.
Conducting an examiner interview provides a -3.5% benefit to allowance rate for applications examined by FERNANDES, ERROL V. This interview benefit is in the 7% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 40.0% of applications are subsequently allowed. This success rate is in the 91% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.
This examiner enters after-final amendments leading to allowance in 34.9% of cases where such amendments are filed. This entry rate is in the 52% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.
When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 97% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.
This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 95% percentile among all examiners. Of these withdrawals, 33.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
When applicants file petitions regarding this examiner's actions, 120.0% are granted (fully or in part). This grant rate is in the 95% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.
Examiner's Amendments: This examiner makes examiner's amendments in 11.3% of allowed cases (in the 94% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 33% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.