USPTO Examiner CIESLEWICZ ANETA B - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18806478HERMETIC MICROELECTRONIC MODULE USING A SHEATHAugust 2024August 2025Allow1221NoNo
18523716Display DeviceNovember 2023March 2025Allow1610NoNo
18221420DISPLAY PANEL AND DISPLAY DEVICEJuly 2023June 2025Allow2321NoNo
18295627ELECTROLUMINESCENT DISPLAY DEVICEApril 2023January 2025Allow2210NoNo
18178660Semiconductor Device and MethodMarch 2023January 2025Allow2210YesNo
17894579SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEAugust 2022January 2025Allow2911NoNo
17760461DISPLAY PANEL AND DISPLAY DEVICEAugust 2022January 2026Allow4220NoNo
17795548DISPLAY PANEL AND DISPLAY DEVICEJuly 2022October 2025Allow3910NoNo
17873159SEMICONDUCTOR DEVICE, BIOSENSOR, BIOSENSOR ARRAY, AND LOGIC CIRCUITJuly 2022July 2025Allow3610YesNo
17871882METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJuly 2022October 2025Allow3811NoNo
17759134SEMICONDUCTOR DEVICEJuly 2022December 2025Abandon4120YesNo
17864353ELECTRONIC DEVICEJuly 2022February 2026Abandon4340NoNo
17808709Mechanisms for Forming FinFET DeviceJune 2022September 2024Allow2710NoNo
17848050INTEGRATED ELECTRONIC DEVICE WITH A PAD STRUCTURE INCLUDING A BARRIER STRUCTURE AND RELATED MANUFACTURING PROCESSJune 2022February 2026Abandon4321YesNo
17837940Integrated Circuit Packages and Methods of Forming SameJune 2022January 2026Allow4331NoNo
17833099SEMICONDUCTOR DEVICE WITH PATTERNED GROUND SHIELDINGJune 2022July 2024Allow2510NoNo
17658335Tiled Lateral ThyristorApril 2022March 2024Allow2310NoNo
17655832Method for Manufacturing Ferromagnetic-Dielectric Composite MaterialMarch 2022May 2024Allow2611NoNo
17590611FLEXIBLE DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEFebruary 2022July 2025Allow4140NoNo
17563607CONFORMAL DIELECTRIC CAP FOR SUBTRACTIVE VIASDecember 2021January 2026Allow4921YesNo
17489910INTEGRATION SCHEME TO BUILD RESISTOR, CAPACITOR, EFUSE USING SILICON-RICH DIELECTRIC LAYER AS A BASE DIELECTRICSeptember 2021August 2025Allow4731NoNo
17353547METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJune 2021February 2025Allow4440YesNo
17317229ORGANIC LIGHT-EMITTING DISPLAY APPARATUSMay 2021April 2025Allow4830NoNo
17246856LIGHT EMITTING DIODEMay 2021February 2025Allow4530NoNo
17245519SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTUREApril 2021March 2025Allow4640YesNo
17301071PATTERNING MATERIAL INCLUDING CARBON-CONTAINING LAYER AND METHOD FOR SEMICONDUCTOR DEVICE FABRICATIONMarch 2021January 2026Allow5850YesNo
17202675RUTHENIUM ETCHING PROCESSMarch 2021October 2025Abandon5550NoNo
17183814METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEFebruary 2021August 2024Abandon4250NoNo
17155520SEMICONDUCTOR PACKAGE WITH WETTABLE FLANKJanuary 2021August 2025Allow5550YesNo
17145500MULTIPLE PATTERNING WITH SELECTIVE MANDREL FORMATIONJanuary 2021December 2025Allow5960YesNo
17138741RELIABLE SEMICONDUCTOR PACKAGESDecember 2020June 2024Abandon4131NoNo
17121320Thin Film Transistor and Display Device Including the SameDecember 2020April 2025Allow5251NoNo
17117283LEADFRAME PACKAGE WITH ADJUSTABLE CLIPDecember 2020March 2024Allow3931NoNo
17099979THIN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOFNovember 2020June 2024Abandon4341NoNo
17069513SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESOctober 2020May 2025Allow5551YesNo
16990516LIGHT-EMITTING DEVICE AND DISPLAY APPARATUS INCLUDING THE SAMEAugust 2020November 2023Allow3940YesNo
16983059SILICON MEMBER AND METHOD OF PRODUCING THE SAMEAugust 2020May 2025Abandon5770NoNo
16966116TOUCH ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOFJuly 2020April 2024Allow4401NoNo
16937367DISPLAY DEVICE AND METHOD OF FABRICATING THE SAMEJuly 2020December 2025Allow6061YesNo
16964167DISPLAY DEVICEJuly 2020September 2025Allow6040NoNo
16924200SEMICONDUCTOR STRUCTURE AND METHODS OF FORMING THE SAMEJuly 2020January 2024Allow4341NoNo
16782882REPLACEMENT BURIED POWER RAIL IN BACKSIDE POWER DELIVERYFebruary 2020March 2025Allow6051YesNo
16475287POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICEJuly 2019October 2024Allow6061YesNo
16454178HIGH K METAL GATE STACK WITH SINGLE WORK-FUNCTION METALJune 2019January 2026Abandon6090YesNo
16186404SEMICONDUCTOR NANOPARTICLES, AND DISPLAY DEVICE AND OLED DISPLAY DEVICE COMPRISING THE SAMENovember 2018September 2024Abandon60100YesNo
15410312Light-Emitting Panel, Display Device, and Method for Manufacturing Light-Emitting PanelJanuary 2017August 2024Abandon6090NoNo
15157197THROUGH-DIELECTRIC-VIAS (TDVs) FOR 3D INTEGRATED CIRCUITS IN SILICONMay 2016April 2024Allow6081NoNo
14998270Technologies for adaptive bandwidth reductionDecember 2015August 2024Allow6070YesYes
14642129SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2015January 2019Allow4731NoNo
14471812METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC MATERIAL AND SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC TRANSISTORAugust 2014April 2016Allow2011NoNo
14197649SEMICONDUCTOR DEVICE WITH LOW-K GATE CAP AND SELF-ALIGNED CONTACTMarch 2014December 2015Allow2120NoNo
14063927THIN FILM TRANSISTOR ARRAY PANEL AND ORGANIC LIGHT EMITTING DIODE DISPLAY INCLUDING THE SAMEOctober 2013February 2016Allow2840YesNo
14059842ANISOTROPIC DIELECTRIC MATERIAL GATE SPACER FOR A FIELD EFFECT TRANSISTOROctober 2013April 2016Allow2931YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner CIESLEWICZ, ANETA B.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
14.3%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
7.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner CIESLEWICZ, ANETA B - Prosecution Strategy Guide

Executive Summary

Examiner CIESLEWICZ, ANETA B works in Art Unit 2893 and has examined 34 patent applications in our dataset. With an allowance rate of 76.5%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 49 months.

Allowance Patterns

Examiner CIESLEWICZ, ANETA B's allowance rate of 76.5% places them in the 43% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by CIESLEWICZ, ANETA B receive 4.62 office actions before reaching final disposition. This places the examiner in the 99% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by CIESLEWICZ, ANETA B is 49 months. This places the examiner in the 7% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.

Interview Effectiveness

Conducting an examiner interview provides a +20.8% benefit to allowance rate for applications examined by CIESLEWICZ, ANETA B. This interview benefit is in the 65% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 15.8% of applications are subsequently allowed. This success rate is in the 12% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 12.2% of cases where such amendments are filed. This entry rate is in the 12% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 18% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 7.7% of allowed cases (in the 86% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Expect multiple rounds of prosecution: This examiner issues more office actions than average. Address potential issues proactively in your initial response and consider requesting an interview early in prosecution.
  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.
  • Plan for extended prosecution: Applications take longer than average with this examiner. Factor this into your continuation strategy and client communications.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.