USPTO Examiner BODNAR JOHN A - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18743906CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEJune 2024December 2025Allow1810YesNo
18664389AMORPHOUS BOTTOM ELECTRODE STRUCTURE FOR MIM CAPACITORSMay 2024September 2025Allow1610YesNo
18655567SELF-ASSEMBLED GUIDED HOLE AND VIA PATTERNING OVER GRATINGMay 2024September 2025Allow1610YesNo
18632439CONTROL OF LOCOS STRUCTURE THICKNESS WITHOUT A MASKApril 2024March 2025Allow1100NoNo
18629967SCHOTTKY BARRIER DIODE WITH REDUCED LEAKAGE CURRENT AND METHOD OF FORMING THE SAMEApril 2024March 2025Allow1100NoNo
18613151SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMarch 2024July 2025Allow1610NoNo
18442794SEMICONDUCTOR DEVICE ISOLATION FEATURESFebruary 2024January 2025Allow1100NoNo
18440452METHODS FOR DEPOSITING AN OXIDE FILM ON A SUBSTRATE BY A CYCLICAL DEPOSITION PROCESS AND RELATED DEVICE STRUCTURESFebruary 2024September 2025Allow1910NoNo
18434954SEMICONDUCTOR DEVICES INCLUDING CAPACITOR AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICESFebruary 2024March 2025Allow1300NoNo
18434711SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEFebruary 2024June 2025Allow1610NoNo
18407020MULTI-FIN VERTICAL FIELD EFFECT TRANSISTOR AND SINGLE-FIN VERTICAL FIELD EFFECT TRANSISTOR ON A SINGLE INTEGRATED CIRCUIT CHIPJanuary 2024July 2025Allow1810YesNo
18406155SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAMEJanuary 2024June 2025Allow1701NoNo
18398378SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEDecember 2023January 2025Allow1300NoNo
18534219TRENCH PLUG HARDMASK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATIONDecember 2023March 2025Allow1510NoNo
18526290Semiconductor Structure Cutting Process and Structures Formed TherebyDecember 2023September 2024Allow1000NoNo
18523174GROUP III-NITRIDE HIGH-ELECTRON MOBILITY TRANSISTORS WITH BURIED P-TYPE LAYERS AND PROCESS FOR MAKING THE SAMENovember 2023August 2025Allow2010NoNo
18521404METHOD OF MAKING POLYSILICON STRUCTURE INCLUDING PROTECTIVE LAYERNovember 2023August 2025Allow2120NoNo
18514010ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION PROCESSNovember 2023March 2025Allow1510NoNo
18513619SEMICONDUCTOR DEVICE STRUCTURE INCLUDING FORKSHEET TRANSISTORS AND METHODS OF FORMING THE SAMENovember 2023February 2025Allow1510NoNo
18502244INTEGRATED CIRCUIT PACKAGE SUPPORTSNovember 2023August 2024Allow1000NoNo
18499258DEVICES INCLUDING STACKED NANOSHEET TRANSISTORSNovember 2023January 2025Allow1510YesNo
18490456PASSIVATION OF INFRARED DETECTORS USING OXIDE LAYEROctober 2023August 2024Allow1000NoNo
18376763CONTINUOUS GATE AND FIN SPACER FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATIONOctober 2023October 2025Allow2530NoNo
18451137SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEAugust 2023March 2026Allow3101NoNo
18450443DISPLAY DEVICEAugust 2023February 2026Allow3000NoNo
18366287SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEAugust 2023February 2026Allow3001NoNo
18365517DEVICE AND METHOD FOR HIGH PRESSURE ANNEALAugust 2023August 2024Allow1200NoNo
18362030SEMICONDUCTOR DEVICEJuly 2023March 2025Allow2020NoNo
18362083Method of Fabricating Redistribution Circuit StructureJuly 2023August 2024Allow1200NoNo
18227357SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAMEJuly 2023November 2025Allow2700YesNo
18360474THREE-DIMENSIONAL MEMORY DEVICE CONTAINING COMPOSITE WORD LINES INCLUDING A RESPECTIVE FLUORINE-FREE CAPPING SUBLAYER AND METHODS OF FORMING THE SAMEJuly 2023February 2026Allow3001NoNo
18359122CAPACITOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2023December 2025Allow2940YesNo
18355997Gate Structure and Method with Enhanced Gate Contact and Threshold VoltageJuly 2023June 2024Allow1100NoNo
18344580SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2023November 2024Allow1710NoNo
18333470THREE-DIMENSIONAL METAL-INSULATOR-METAL CAPACITORSJune 2023October 2025Allow2800NoNo
18315836SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF AND ELECTRONIC APPARATUS INCLUDING THE SAMEMay 2023June 2024Allow1400YesNo
18195269FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERSMay 2023March 2024Allow1100NoNo
18133086DISPLAY DEVICEApril 2023August 2025Abandon2830NoNo
18130573Digital Isolator Structure and Method for Forming the SameApril 2023February 2026Allow3401NoNo
18295433METHOD OF FABRICATING A SEMICONDUCTOR DEVICEApril 2023October 2025Allow3000NoNo
18295010FILL FINS FOR SEMICONDUCTOR DEVICESApril 2023September 2025Allow3030YesNo
18128433METHOD AND SYSTEM FOR MIXED GROUP V PRECURSOR PROCESSMarch 2023October 2025Allow3000NoNo
18025812VARIABLE CAPACITOR AND INTEGRATED CIRCUITMarch 2023September 2025Allow3100NoNo
18119043METHOD FOR MANUFACTURING CAPACITOR STRUCTUREMarch 2023May 2024Allow1410NoNo
18119009CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEMarch 2023May 2024Allow1410NoNo
18117539SEMICONDUCTOR DEVICE WITH REDISTRIBUTION LAYERS FORMED UTILIZING DUMMY SUBSTRATESMarch 2023April 2025Allow2631NoNo
18116318SILICON CAPACITOR STRUCTURE AND METHOD OF MANUFACTURING THE SAMEMarch 2023February 2026Allow3501NoNo
18115165POWER SEMICONDUCTOR DEVICEFebruary 2023June 2025Allow2800NoNo
18173934Method For Growing Multiple Layers of Source Drain Epitaxial Silicon in FDSOI ProcessFebruary 2023June 2025Allow2800NoNo
18108755METHOD FOR PREPARING SEMICONDUCTOR DEVICE STRUCTURE WITH BOTTOM CAPACITOR ELECTRODE HAVING CROWN-SHAPED STRUCTURE AND INTERCONNECT PORTIONFebruary 2023November 2023Allow900NoNo
18162775METAL-INSULATOR-METAL (MIM) CAPACITORS WITH CURVED ELECTRODEFebruary 2023January 2026Allow3611YesNo
18104711SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2023November 2025Allow3401NoNo
18103201INTEGRATION SCHEME FOR FABRICATING HIGH PRECISION, LOW CAPACITOR WITH UNLANDED VIAJanuary 2023January 2026Allow3511YesNo
18101134STRUCTURES AND METHODS OF FABRICATING ELECTRONIC DEVICES USING SEPARATION AND CHARGE DEPLETION TECHNIQUESJanuary 2023November 2023Allow900NoNo
18156024FORMING WRAP AROUND CONTACT WITH SELF-ALIGNED BACKSIDE CONTACTJanuary 2023January 2026Allow3611YesNo
18153652SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2023June 2025Allow2930NoNo
18152870METHOD FOR MANUFACTURING GATE OF NAND FLASHJanuary 2023September 2025Allow3210NoNo
18151940MASK ASSEMBLY AND APPARATUS AND METHOD OF MANUFACTURING DISPLAY APPARATUSJanuary 2023July 2024Allow1810NoNo
18094088HIGH RESISTANCE POLY RESISTORJanuary 2023February 2024Allow1401NoNo
18149226LOW RESISTIVITY DRAM BURIED WORD LINE STACKJanuary 2023February 2024Allow1300NoNo
18149197METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTUREJanuary 2023September 2025Allow3310NoNo
18149225METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTUREJanuary 2023December 2025Allow3511NoNo
18088631SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEDecember 2022February 2024Allow1310NoNo
18002513METHOD AND APPARATUS TO MITIGATE WORD LINE STAIRCASE ETCH STOP LAYER THICKNESS VARIATIONS IN 3D NAND DEVICESDecember 2022May 2025Allow2900NoNo
18067776METHOD TO REDUCE BREAKDOWN FAILURE IN A MIM CAPACITORDecember 2022May 2025Allow2900NoNo
18080976HIGH VOLTAGE ISOLATED MICROELECTRONIC DEVICEDecember 2022February 2024Allow1401YesNo
18078064CAPACITOR ON FIN STRUCTURE AND FABRICATING METHOD OF THE SAMEDecember 2022March 2026Allow3921NoNo
18072307NON-VOLATILE MEMORY STRUCTURE AND METHOD FOR FORMING THE SAMENovember 2022June 2025Allow3101NoNo
18057894SEMICONDUCTOR DEVICES INCLUDING CAPACITOR AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICESNovember 2022November 2023Allow1100NoNo
17985965ELECTRONIC FUSES WITH AN AIRGAP UNDER THE FUSE LINKNovember 2022December 2025Allow3711NoNo
17981561STRUCTURES AND METHODS FOR MEMORY CELLSNovember 2022October 2025Allow3510YesNo
17979345STACKED TRANSISTORS WITH DIFFERENT CHANNEL WIDTHSNovember 2022October 2024Allow2320NoNo
17967354LOW WARP FAN-OUT PROCESSING METHOD AND PRODUCTION OF SUBSTRATES THEREFOROctober 2022September 2023Allow1100NoNo
17995791METHOD FOR MANUFACTURING A SeOI INTEGRATED CIRCUIT CHIPOctober 2022September 2025Allow3510NoNo
17958922MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEOctober 2022January 2026Allow3911NoNo
17937360METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMSSeptember 2022January 2026Allow4011NoNo
17956157SELECTIVE OXIDATION OF A SUBSTRATESeptember 2022June 2025Allow3201NoNo
17936846SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAMESeptember 2022August 2025Allow3401NoNo
17943336METHODS FOR DEPOSITING AN OXIDE FILM ON A SUBSTRATE BY A CYCLICAL DEPOSITION PROCESS AND RELATED DEVICE STRUCTURESSeptember 2022October 2023Allow1300NoNo
17941534SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAMESeptember 2022November 2025Allow3811NoNo
17929911ELECTRONIC DEVICES INCLUDING ISOLATION STRUCTURES EXHIBITING A WEAVE PATTERN, AND RELATED MEMORY DEVICES, SYSTEMS, AND METHODSSeptember 2022January 2026Allow4011NoNo
17898827SELF-SUPPORTING SGD STADIUMAugust 2022February 2026Allow4221NoNo
17892157SEMICONDUCTOR DEVICE AND MANUFACTURING METHODAugust 2022August 2025Allow3610NoNo
17891028ENHANCED DEPOSITION RATE BY THERMAL ISOLATION COVER FOR GIS MANIPULATORAugust 2022February 2025Allow3000NoNo
17890969CONTINUOUS GATE AND FIN SPACER FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATIONAugust 2022June 2023Allow1000NoNo
17886380INNOVATIVE FAN-OUT PANEL LEVEL PACKAGE (FOPLP) WARPAGE CONTROLAugust 2022March 2024Allow1910NoNo
17818279SUPPORT STRUCTURES FOR THREE DIMENSIONAL MEMORY ARRAYSAugust 2022April 2025Allow3301YesNo
17877056SEMICONDUCTOR MEMORY DEVICEJuly 2022May 2024Allow2120YesNo
17874732Semiconductor Device and MethodJuly 2022November 2023Allow1610NoNo
17872417Semiconductor Structure Cutting Process and Structures Formed TherebyJuly 2022August 2023Allow1300NoNo
17869826SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEJuly 2022June 2023Allow1100NoNo
17867369TRENCH PLUG HARDMASK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATIONJuly 2022September 2023Allow1400NoNo
17863273NOVEL RESISTIVE RANDOM ACCESS MEMORY DEVICEJuly 2022October 2024Allow2730NoNo
17862609SEMICONDUCTOR DEVICES AND RELATED METHODSJuly 2022August 2025Allow3760NoNo
17859425GALLIUM NITRIDE HIGH-ELECTRON MOBILITY TRANSISTORS WITH P-TYPE LAYERS AND PROCESS FOR MAKING THE SAMEJuly 2022July 2024Allow2420NoNo
17857699SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJuly 2022June 2023Allow1100NoNo
17809956Cell ManufacturingJune 2022May 2024Allow2220NoNo
17788555DISPLAY PANEL AND DISPLAY DEVICEJune 2022May 2025Allow3510NoNo
17848008VERTICAL MEMORY DEVICES AND METHOD OF FABRICATION THEREOFJune 2022August 2025Allow3811NoNo
17846371SEMICONDUCTOR MODULE, ELECTRICAL COMPONENT, AND CONNECTION STRUCTURE OF THE SEMICONDUCTOR MODULE AND THE ELECTRICAL COMPONENTJune 2022December 2024Allow3000YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BODNAR, JOHN A.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
6
Examiner Affirmed
5
(83.3%)
Examiner Reversed
1
(16.7%)
Reversal Percentile
28.6%
Lower than average

What This Means

With a 16.7% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
18
Allowed After Appeal Filing
8
(44.4%)
Not Allowed After Appeal Filing
10
(55.6%)
Filing Benefit Percentile
73.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 44.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner BODNAR, JOHN A - Prosecution Strategy Guide

Executive Summary

Examiner BODNAR, JOHN A works in Art Unit 2893 and has examined 574 patent applications in our dataset. With an allowance rate of 82.4%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 25 months.

Allowance Patterns

Examiner BODNAR, JOHN A's allowance rate of 82.4% places them in the 55% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by BODNAR, JOHN A receive 2.03 office actions before reaching final disposition. This places the examiner in the 53% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by BODNAR, JOHN A is 25 months. This places the examiner in the 80% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +11.4% benefit to allowance rate for applications examined by BODNAR, JOHN A. This interview benefit is in the 46% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 24.5% of applications are subsequently allowed. This success rate is in the 36% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 34.9% of cases where such amendments are filed. This entry rate is in the 52% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 100.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 74% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 68.4% of appeals filed. This is in the 54% percentile among all examiners. Of these withdrawals, 53.8% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 50.0% are granted (fully or in part). This grant rate is in the 48% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.3% of allowed cases (in the 57% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.8% of allowed cases (in the 59% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

    Relevant MPEP Sections for Prosecution Strategy

    • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
    • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
    • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
    • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
    • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
    • MPEP § 1214.07: Reopening prosecution after appeal

    Important Disclaimer

    Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

    No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

    Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

    Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.