USPTO Examiner BARZYKIN VICTOR V - Art Unit 2893

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19109527POWER MODULE COMPRISING A SEMICONDUCTOR MODULE COMPONENT AND AN ALIGNMENT PART, AND METHOD FOR FORMING THE POWER MODULEMarch 2025June 2025Allow300NoNo
18650844MOS-Based Power Semiconductor Device Having Increased Current Carrying Area and Method of Fabricating SameApril 2024October 2025Allow1810NoNo
18582312METAL PADS OVER TSVFebruary 2024October 2025Allow2030NoNo
18444959Vias for Cobalt-Based Interconnects and Methods of Fabrication ThereofFebruary 2024July 2025Allow1620NoNo
18392923METHOD FOR PRODUCING A SUPERJUNCTION DEVICEDecember 2023July 2025Allow1920NoNo
18523054IMAGING ELEMENT, STACKED-TYPE IMAGING ELEMENT AND SOLID-STATE IMAGING APPARATUSNovember 2023February 2025Allow1410NoNo
18471517LIGHT EMITTING DIODE ARRAY CONTAINING A BLACK MATRIX AND AN OPTICAL BONDING LAYER AND METHOD OF MAKING THE SAMESeptember 2023May 2025Allow2020YesNo
18471353SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAMESeptember 2023March 2025Allow1810NoNo
18469431MICROELECTRONIC DEVICES AND RELATED METHODS OF FABRICATING MICROELECTRONIC DEVICESSeptember 2023May 2025Allow2011NoNo
18236246METHOD OF TRANSFERRING MICRO-LIGHT EMITTING DIODE FOR LED DISPLAYAugust 2023September 2024Allow1310NoNo
18359416System and Method for Bonding Semiconductor DevicesJuly 2023June 2025Allow2211NoNo
18356710OVERLAY MARKS FOR REDUCING EFFECT OF BOTTOM LAYER ASYMMETRYJuly 2023October 2025Allow2700NoNo
18272746Position Specification Method, Position Specification Program, and Inspection ApparatusJuly 2023March 2026Allow3210NoNo
18314433OVERLAY MARK FORMING MOIRE PATTERN, OVERLAY MEASUREMENT METHOD USING SAME, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING SAMEMay 2023February 2024Allow900NoNo
18136708METHOD AND APPARATUS FOR PLASMA DICING A SEMI-CONDUCTOR WAFERApril 2023February 2026Abandon3410NoNo
18247861METHOD FOR PRODUCING AN ELECTRONIC COMPONENT ASSEMBLY ON THE FRONT FACE OF A SEMI-CONDUCTOR WAFERApril 2023October 2025Allow3000NoNo
18191135DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEMarch 2023April 2024Allow1210NoNo
18168467MULTI-ZONE GAS DISTRIBUTION SYSTEMS AND METHODSFebruary 2023July 2024Allow1710NoNo
18167884MICROELECTROMECHANICAL SYSTEM DEVICEFebruary 2023June 2025Allow2820NoNo
18162066Alignment Method for Image Sensor Fabrication and Associated Semiconductor DeviceJanuary 2023February 2026Allow3701NoNo
17986976SEMICONDUCTOR DEVICE INCLUDING AN ALIGNMENT PATTERNNovember 2022March 2026Allow4001NoNo
17976006SEMICONDUCTOR MODULEOctober 2022November 2025Allow3610NoNo
17964194CONTROLLING OFF-STATE APPEARANCE OF A LIGHT EMITTING DEVICEOctober 2022March 2024Allow1720NoNo
17872117SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, MEMORY AND METHOD FOR MANUFACTURING THE SAMEJuly 2022October 2025Allow3910NoNo
17813362SEMICONDUCTOR PACKAGEJuly 2022February 2026Allow4310YesNo
17862659Methods of Forming Integrated Assemblies Having Conductive Material Along Sidewall Surfaces of Semiconductor PillarsJuly 2022April 2024Allow2130NoNo
17789518DISPLAY SUBSTRATE, PREPARATION METHOD THEREFOR, AND DISPLAY DEVICEJune 2022June 2025Allow3600NoNo
17846606INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF FABRICATING THE SAMEJune 2022February 2026Allow4411YesNo
17807819THREE-DIMENSIONAL MEMORY DEVICE CONTAINING DUMMY STACK EDGE SEAL STRUCTURE AND METHODS FOR FORMING THE SAMEJune 2022February 2026Allow4411NoNo
17787326OPTOELECTRONIC COMPONENT COMPRISING, ON A SINGLE SUBSTRATE, AN OPTICAL TRANSDUCER MADE OF A SEMI-CONDUCTOR MATERIAL III-V AND AN OPTICALLY SCANNING MICROELECTROMECHANICAL SYSTEMJune 2022October 2024Allow2800NoNo
17841155SEMICONDUCTOR PACKAGEJune 2022January 2026Allow4310YesNo
17807006SHALLOW AND DEEP CONTACTS WITH STITCHINGJune 2022January 2026Allow4311NoNo
17806361SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFJune 2022October 2025Allow4011NoNo
17825224PROCESSING STACKED SUBSTRATESMay 2022April 2025Allow3430NoNo
17779741DISPLAY PANEL, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICEMay 2022February 2026Allow4511NoNo
17733289ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL, METHOD FOR PREPARING THE SAME, AND DISPLAY DEVICEApril 2022March 2024Allow2220NoNo
17659834ELECTRONIC DEVICE WITH GALVANIC ISOLATION AND INTEGRATION METHODSApril 2022March 2026Allow4721NoNo
17722689CORE SUBSTRATE, PACKAGE STRUCTURE INCLUDING THE CORE SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGEApril 2022July 2025Allow3911YesNo
17659197STACKED TRANSISTORS HAVING BOTTOM CONTACT WITH REPLACEMENT SPACERApril 2022May 2025Allow3710NoNo
17715377DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2022November 2025Allow4311NoNo
17754243DISPLAY DEVICEMarch 2022April 2025Allow3610NoNo
17704435Conductive Features of Semiconductor Devices and Methods of Forming the SameMarch 2022July 2025Allow4021NoNo
17703963OPTICAL MODULE AND IMAGE DISPLAY DEVICEMarch 2022December 2024Allow3310NoNo
17639736THROUGH-SUBSTRATE VIA AND METHOD FOR MANUFACTURING A THROUGH-SUBSTRATE VIAMarch 2022November 2024Allow3310NoNo
17589472WAFER ALIGNMENT FOR STACKED WAFERS AND SEMICONDUCTOR DEVICE ASSEMBLIESJanuary 2022October 2025Allow4511NoNo
17586654SEMICONDUCTOR STRUCTUREJanuary 2022September 2024Abandon3110NoNo
17579743Super Junction Structure and Method for Manufacturing the SameJanuary 2022May 2025Allow3911NoNo
17575867SEMICONDUCTOR STRUCTUREJanuary 2022June 2025Abandon4120NoNo
17569284SUPERJUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAMEJanuary 2022April 2024Allow2810NoNo
17568041MARKS FOR OVERLAY MEASUREMENT AND OVERLAY ERROR CORRECTIONJanuary 2022March 2024Allow2720NoNo
17554536POWER SEMICONDUCTOR DEVICE AND METHODS OF PRODUCING A POWER SEMICONDUCTOR DEVICEDecember 2021January 2026Allow4940NoYes
17532093HIGH VOLTAGE SOLID-STATE TRANSDUCERS AND SOLID-STATE TRANSDUCER ARRAYS HAVING ELECTRICAL CROSS-CONNECTIONS AND ASSOCIATED SYSTEMS AND METHODSNovember 2021September 2024Allow3430NoNo
17532423PROCESSOR DIE ALIGNMENT GUIDESNovember 2021June 2025Allow4341YesNo
17529549MULTI-LAYERED STRUCTURE AND METHOD FOR MANUFACTURING THE SAMENovember 2021May 2025Allow4211NoNo
17519512ON-PRODUCT OVERLAY TARGETSNovember 2021December 2023Allow2600NoNo
17499579MOS-Based Power Semiconductor Device Having Increased Current Carrying Area and Method of Fabricating SameOctober 2021December 2023Allow2620NoNo
17472387TEMPLATE, WORKPIECE, AND ALIGNMENT METHODSeptember 2021May 2024Allow3210YesNo
17470731SEMICONDUCTOR DEVICESeptember 2021December 2024Abandon4020NoNo
17471038TEMPLATE, MANUFACTURING METHOD OF TEMPLATE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICESeptember 2021May 2024Allow3210NoNo
17412022SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEAugust 2021September 2024Allow3721NoNo
17431756SEMICONDUCTOR MARKS AND FORMING METHODS THEREOFAugust 2021October 2024Allow3810NoNo
17404264ALIGNMENT MARK STRUCTURE AND METHOD FOR MAKINGAugust 2021March 2024Allow3110NoNo
17310664A MASK LAYOUT METHOD, A MASK LAYOUT DEVICE, AND A MASKAugust 2021September 2024Abandon3720NoNo
17402622DISPLAY PANEL, PREPARATION METHOD THEREOF AND DISPLAY APPARATUSAugust 2021October 2024Allow3810NoNo
17401502CAPACITOR STRUCTURE AND METHOD OF MANUFACTURING SAME, AND MEMORYAugust 2021December 2024Allow4011NoNo
17389887SUPER JUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJuly 2021April 2024Allow3230NoNo
17443820SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF, AND METHOD FOR FUSING LASER FUSEJuly 2021September 2024Abandon3820NoNo
17386470SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAMEJuly 2021January 2024Allow3010NoNo
17381992SEMICONDUCTOR WAFER, ELECTRONIC DEVICE, METHOD OF PERFORMING INSPECTION ON SEMICONDUCTOR WAFER, AND METHOD OF MANUFACTURING ELECTRONIC DEVICEJuly 2021July 2024Allow3610NoNo
17380041SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2021February 2025Allow4310NoNo
17380040SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2021February 2025Allow4310NoNo
17380044SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2021April 2025Allow4421NoNo
17380043SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2021March 2025Allow4410NoNo
17420718SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2021July 2024Allow3610NoNo
17349741FinFET Devices with Embedded Air Gaps and the Fabrication ThereofJune 2021April 2024Allow3410YesNo
17345265SUPER JUNCTION POWER DEVICE AND METHOD OF MAKING THE SAMEJune 2021October 2024Allow4031NoNo
17330562SUPERJUNCTION TRANSISTOR DEVICE AND METHOD FOR FORMING A SUPERJUNCTION TRANSISTOR DEVICEMay 2021March 2024Allow3321NoNo
17293617Semiconductor Device and in-Vehicle Electronic Control Device Using the SameMay 2021May 2024Allow3610NoNo
17291737RADIATION DETECTOR AND METHOD FOR PRODUCING SAMEMay 2021December 2024Abandon4320NoNo
17287578MAGNETORESISTIVE ELEMENTApril 2021December 2025Abandon5640NoNo
17277832DISPLAY DEVICE AND MANUFACTURING METHOD THEREOFMarch 2021February 2025Allow4730YesNo
17186487METHOD FOR FORMING BARRIER LAYER IN SEMICONDUCTOR STRUCTUREFebruary 2021April 2024Allow3710YesNo
17269737LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE HAVING SAMEFebruary 2021April 2024Allow3710NoNo
17133636CHIP PACKAGE AND METHOD FOR FORMING THE SAMEDecember 2020May 2024Abandon4131NoNo
17087740PROTECTION STRUCTURES FOR SEMICONDUCTOR DEVICES WITH SENSOR ARRANGEMENTSNovember 2020October 2024Allow4750NoNo
16905071SEMICONDUCTOR DEVICEJune 2020July 2024Allow4951NoNo
15091952HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEApril 2016October 2017Allow1910NoNo
15091447SEMICONDUCTOR DEVICE, METAL MEMBER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEApril 2016September 2018Allow2920NoNo
15082622SINGLE SOURCE/DRAIN EPITAXY FOR CO-INTEGRATING nFET SEMICONDUCTOR FINS AND pFET SEMICONDUCTOR FINSMarch 2016January 2017Allow1020NoNo
15041814METHODS OF FABRICATING A PHOTOVOLTAIC MODULE, AND RELATED SYSTEMFebruary 2016July 2016Allow500YesNo
14744543METHOD FOR ELIMINATING MASK SELF-MAGNETIZATION, SUBSTRATE MANUFACTURING METHOD AND MASK TESTING DEVICEJune 2015November 2017Allow2910NoNo
14566197SEMICONDUCTOR DEVICEDecember 2014September 2016Allow2120NoNo
14496525MRAM INTEGRATION WITH LOW-K INTER-METAL DIELECTRIC FOR REDUCED PARASITIC CAPACITANCESeptember 2014November 2016Allow2610NoNo
13704613A TRANSISTOR AND METHOD OF MAKINGMay 2014October 2016Allow4610NoNo
14184554DEPOSIT/ETCH FOR TAPERED OXIDEFebruary 2014July 2016Allow2910NoNo
13997992LOW TEMPERATURE THIN WAFER BACKSIDE VACUUM PROCESS WITH BACKGRINDING TAPEJune 2013March 2016Allow3321YesNo
13925951CONDUCTIVE OXIDE RANDOM ACCESS MEMORY (CORAM) CELL AND METHOD OF FABRICATING SAMEJune 2013September 2016Allow3930NoNo
13997615SEMICONDUCTOR SUBSTRATE FOR AN OPTICAL RECEIVERJune 2013March 2015Allow2110YesNo
13845666SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAMEMarch 2013December 2015Allow3341YesNo
13716009CIGS Absorber Formed By Co-Sputtered IndiumDecember 2012August 2014Allow2020NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BARZYKIN, VICTOR V.

Strategic Value of Filing an Appeal

Total Appeal Filings
2
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
2
(100.0%)
Filing Benefit Percentile
7.5%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner BARZYKIN, VICTOR V - Prosecution Strategy Guide

Executive Summary

Examiner BARZYKIN, VICTOR V works in Art Unit 2893 and has examined 54 patent applications in our dataset. With an allowance rate of 88.9%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 37 months.

Allowance Patterns

Examiner BARZYKIN, VICTOR V's allowance rate of 88.9% places them in the 70% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by BARZYKIN, VICTOR V receive 1.98 office actions before reaching final disposition. This places the examiner in the 50% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by BARZYKIN, VICTOR V is 37 months. This places the examiner in the 33% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +13.6% benefit to allowance rate for applications examined by BARZYKIN, VICTOR V. This interview benefit is in the 51% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 33.3% of applications are subsequently allowed. This success rate is in the 72% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 36.0% of cases where such amendments are filed. This entry rate is in the 54% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 97% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 95% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 66.7% are granted (fully or in part). This grant rate is in the 73% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 33% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.