USPTO Examiner SMITH III BRUCE ROBERT - Art Unit 2892

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18648758DEVICE WITH A MULTIZONE REFLECTOR HAVING A DISCREET OPENING FOR A SENSORApril 2024July 2025Allow1410NoNo
18648513METHOD FOR FORMING SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND RECYCLE SUBSTRATEApril 2024October 2025Allow1820NoNo
18628233SEMICONDUCTOR DEVICE WITH VERTICAL PATTERNS AND DATA STORAGE SYSTEM INCLUDING THE SAMEApril 2024April 2025Allow1210NoNo
18048996INTERCONNECT SUBSTRATE WITH LAYERS CONSTITUTING STRIPLINE AND SEMICONDUCTOR APPARATUSOctober 2022September 2025Allow3550YesNo
18046557INTERCONNECT SUBSTRATE HAVING GROOVE AROUND PADOctober 2022November 2024Allow2530NoNo
17957147SEMICONDUCTOR DEVICE HAVING A THREE-DIMENSIONSAL STRUCTURE AND METHOD FOR FABRICATING THE SAMESeptember 2022August 2025Allow3510NoNo
17939649FLIP-CHIP LIGHT-EMITTING DEVICE HAVING AT LEAST ONE STACK UNIT THAT IS FREE OF GOLDSeptember 2022January 2026Allow4020NoNo
17747462INTEGRATED CIRCUIT MEMORY DEVICES HAVING MULTI-PITCH CHANNEL COLUMNS THEREINMay 2022May 2025Allow3620YesNo
17738568SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC LAYER, DIELECTRIC LAYER, AND CHARGE TRAP SITE, AND METHOD OF FABRICATING THE SAMEMay 2022December 2025Allow4430NoNo
17755381DISPLAY PANEL INCLUDING BLACK MATRIX LAYER PROVIDED WITH BLACK MATRIX OPENING HAVING TRANSITIONAL CONNECTION, AND DISPLAY APPARATUSApril 2022September 2025Allow4130YesNo
176921353D MONOLITHIC STACKING MEMORY STRUCTURE WITH OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND FERROELECTRIC METAL-INSULATOR-METAL STORAGE CAPACITORMarch 2022July 2025Allow4030YesNo
17668644SEMICONDUCTOR STRUCTURE WHEREIN AN AIR GAP IS ARRANGED IN A BASE AND METHOD FOR MANUFACTURING THE SAMEFebruary 2022May 2025Abandon3920NoNo
17665646DISPLAY DEVICE HAVING STRUCTURE FOR REDUCING LEAKAGE CURRENTFebruary 2022May 2025Abandon4020NoNo
17586699METHOD FOR INTEGRATING HIGH-VOLTAGE (HV) DEVICE, MEDIUM-VOLTAGE (MV) DEVICE, AND LOW-VOLTAGE (LV) DEVICEJanuary 2022November 2024Allow3441YesNo
17630275DISPLAY PANEL WITH ISOLATION SLOT, AND DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE SAMEJanuary 2022September 2025Allow4311NoNo
17648952MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE COMPRISING A GAP AND SEMICONDUCTOR STRUCTURE COMPRISING A GAPJanuary 2022March 2025Allow3810YesNo
17628671DISPLAY PANEL WITH STORAGE CAPACITOR HAVING DIFFERENT CARRIER MOBILITY REGIONS AND DISPLAY DEVICEJanuary 2022July 2025Allow4120NoNo
17628390SUBSTRATE FOR AN ELECTRONIC DEVICE AND METHOD FOR PRODUCING THE SAMEJanuary 2022April 2025Abandon3920NoNo
17628376SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND ELECTRONIC APPARATUS HAVING AN ELECTRODE EXTENDING TOWARD A GATE ELECTRODE FROM A CONTACT REGIONJanuary 2022March 2025Abandon3820NoNo
17628381DISPLAY DEVICE WITH A DRIVER CIRCUIT COMPRISING A PLURALITY OF PULSE OUTPUT CIRCUITSJanuary 2022February 2025Allow3720NoNo
17626913OPTOELECTRONIC DEVICE COMPRISING MULTICOLOUR LIGHT-EMITTING DIODES AND A METHOD OF MANUFACTURING AN OPTOELECTRONIC DEVICEJanuary 2022January 2025Allow3610NoNo
17626055NITRIDE SEMICONDUCTOR DEVICE WITH SUPPRESSED LEAKAGE CURRENT AND METHOD OF FABRICATING THE SAMEJanuary 2022August 2025Allow4321NoNo
17559406DIRECTED SELF-ASSEMBLY ENABLED PATTERNING OVER METAL LAYERS USING ASSISTING FEATURESDecember 2021December 2024Allow3511YesNo
17532304FLEXIBLE OLED DISPLAY WITH RELIEFSNovember 2021June 2025Allow4330YesNo
17454216DISPLAY DEVICE INCLUDING A FIRST ALIGNMENT MARK AND METHOD FOR FABRICATING THE SAMENovember 2021September 2025Allow4631YesNo
17520118DISPLAY DEVICE WITH A BANK PATTERN COMPRISING A SAME SEMICONDUCTOR MATERIAL AS A LIGHT EMITTING ELEMENTNovember 2021November 2024Allow3611NoNo
17453516BACKSIDE METAL-INSULATOR-METAL (MIM) CAPACITORS EXTENDING THROUGH BACKSIDE INTERLAYER DIELECTRIC (BILD) LAYER OR SEMICONDUCTOR LAYER AND PARTLY THROUGH DIELECTRIC LAYERNovember 2021March 2024Allow2900NoNo
17518147COLOR FILTER STRUCTURE USING QUANTUM DOTS AND DISPLAY DEVICENovember 2021December 2024Allow3720NoNo
17515864SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER IN WHICH ONE OR MORE DIES ARE FORMED AND METHOD OF FORMING THE SAMENovember 2021July 2024Allow3210YesNo
17605507DISPLAY PANEL WITH LIGHT-SHIELDING LAYER AND DISPLAY DEVICE INCLUDING SAMEOctober 2021November 2024Allow3720NoNo
17460673METHOD AND SYSTEM FOR FORMING PATTERNED FEATURES ON A SURFACE OF A SUBSTRATE USING A PLASMA-ENHANCED CYCLICAL DEPOSITION PROCESSAugust 2021July 2025Allow4640YesNo
17461370METHOD FOR FORMING SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE BY CLEAVING A MULTILAYER STRUCTURE ALONG VOIDS TO SEPARATE A SUBSTRATEAugust 2021January 2024Allow2900YesNo
17425114DISPLAY SUBSTRATE WITH HOLE-FORMING AREAS, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE DISPLAY SUBSTRATEJuly 2021September 2024Allow3820NoNo
17373902SEMICONDUCTOR DEVICE, WITH SUPPORT AND BARRIER PATTERNS IN CONNECTION REGIONS, AND DATA STORAGE SYSTEM INCLUDING THE SAMEJuly 2021December 2023Allow2900NoNo
17372963Semiconductor Heterostructure with Band Gap Control for Improved Light EmissionJuly 2021November 2025Allow5250YesNo
17370912SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING DECOUPLING CAPACITOR CELLS AND CORRECTION CELLS AS STANDARD CELLSJuly 2021September 2024Abandon3820NoNo
17359564Avalanche Photo-Detector With An Integrated Reflector And Method Of Making The SameJune 2021May 2025Abandon4631NoNo
17417730DISPLAY DEVICE INCLUDING ELECTRODE PATTERNS COUPLED BY A CONNECTION PATTERN AND REPAIR METHOD THEREFORJune 2021March 2024Allow3310NoNo
17353277DISPLAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE WITH POWER LINE BELOW DATA LINEJune 2021November 2023Allow2900NoNo
17347322METHODS FOR FORMING EXTREME ULTRAVIOLET MASK COMPRISING MAGNETIC MATERIALJune 2021July 2024Allow3721NoNo
17338347IMAGE SENSING DEVICE INCLUDING ISOLATION DEVICE BETWEEN UNIT PIXEL BLOCKSJune 2021November 2023Allow2900NoNo
17318306SEMICONDUCTOR DEVICE HAVING DUMMY STRUCTURES IN A PERIPHERAL REGION AND DATA STORAGE SYSTEM INCLUDING THE SAMEMay 2021July 2024Allow3830YesNo
17317605PHOTOELECTRIC CONVERSION APPARATUS HAVING SEMICONDUCTOR SUBSTRATES AND PROTECTION CIRCUITSMay 2021September 2024Allow4040NoNo
17315248DISPLAY DEVICES WITH DETACHABLE BONDING AREAS AND MANUFACTURING METHODS THEREOFMay 2021August 2024Allow3920NoNo
17246750THREE DIMENSIONAL NAND MEMORY DEVICE WITH NOVEL SUPPORT STRUCTURESMay 2021July 2024Allow3821YesNo
17238908SEMICONDUCTOR INTEGRATED CIRCUIT WITH EDGE STRUCTURE TO DECREASE LEAKAGE CURRENTApril 2021December 2023Allow3110YesNo
17237478A DEVICE WITH A MULTIZONE REFLECTOR HAVING A DISCREET OPENING FOR A SENSORApril 2021January 2024Allow3320NoNo
17199123METHODS FOR REDUCTION OF PHOTORESIST DEFECTMarch 2021September 2025Allow5450NoNo
17193769METHOD FOR PRODUCING PARTITION WALL, IMAGE DISPLAY DEVICE AND METHOD FOR PRODUCING SAMEMarch 2021December 2024Abandon4530NoNo
17259523DISPLAY DEVICE INCLUDING CONDUCTIVE LAYER OVERLAPPING WITH PAD PORTIONJanuary 2021February 2024Allow3710NoNo
17121313TRANSISTOR CHANNEL MATERIALS WITH DOPANTSDecember 2020November 2024Abandon4720NoNo
17047176IMAGING DEVICE, STACKED IMAGING DEVICE, AND SOLID-STATE IMAGING APPARATUS FOR IMPROVED ELECTRIC CHARGE TRANSFEROctober 2020June 2024Abandon4420NoNo
17047162IMAGING ELEMENT, LAMINATED IMAGING ELEMENT, AND SOLID-STATE IMAGING DEVICE WITH IMPROVED CHARGE TRANSFEROctober 2020May 2024Abandon4420NoNo

Appeals Overview

No appeal data available for this record. This may indicate that no appeals have been filed or decided for applications in this dataset.

Examiner SMITH III, BRUCE ROBERT - Prosecution Strategy Guide

Executive Summary

Examiner SMITH III, BRUCE ROBERT works in Art Unit 2892 and has examined 31 patent applications in our dataset. With an allowance rate of 80.6%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 38 months.

Allowance Patterns

Examiner SMITH III, BRUCE ROBERT's allowance rate of 80.6% places them in the 51% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by SMITH III, BRUCE ROBERT receive 1.97 office actions before reaching final disposition. This places the examiner in the 49% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by SMITH III, BRUCE ROBERT is 38 months. This places the examiner in the 30% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +28.6% benefit to allowance rate for applications examined by SMITH III, BRUCE ROBERT. This interview benefit is in the 76% percentile among all examiners. Recommendation: Interviews are highly effective with this examiner and should be strongly considered as a prosecution strategy. Per MPEP § 713.10, interviews are available at any time before the Notice of Allowance is mailed or jurisdiction transfers to the PTAB.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 29.4% of applications are subsequently allowed. This success rate is in the 56% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 25.0% of cases where such amendments are filed. This entry rate is in the 34% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Petition Practice

When applicants file petitions regarding this examiner's actions, 0.0% are granted (fully or in part). This grant rate is in the 5% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 8.0% of allowed cases (in the 86% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Prioritize examiner interviews: Interviews are highly effective with this examiner. Request an interview after the first office action to clarify issues and potentially expedite allowance.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.