USPTO Examiner GORDON MATTHEW E - Art Unit 2892

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18741440DISPLAY DEVICE CONFIGURED TO PREVENT PROPAGATION OF CRACKS, AND METHOD OF REPAIRING SAMEJune 2024January 2025Allow800YesNo
18732345METHODS AND APPARATUS FOR MEASURING ANALYTES USING LARGE SCALE FET ARRAYSJune 2024December 2024Allow600YesNo
18673615FIN FIELD-EFFECT TRANSISTOR DEVICE HAVING HYBRID WORK FUNCTION LAYER STACKMay 2024December 2024Allow700NoNo
18669033DEVICE CHIP SCALE PACKAGE INCLUDING A PROTECTIVE LAYER AND METHOD OF MANUFACTURING A DEVICE CHIP SCALE PACKAGEMay 2024April 2025Allow1110NoNo
18655640SEMICONDUCTOR NANOSTRUCTURES DEVICE STRUCTURE WITH BACKSIDE CONTACTMay 2024December 2024Allow700YesNo
18651194DRIVE CIRCUIT ARRAY SUBSTRATE INCLUDING WELL TAPS PROVIDED IN SUBSET THEREOF, DISPLAY DEVICE, AND ELECTRONIC APPARATUSApril 2024November 2024Allow700YesNo
18642214Semiconductor Package With EMI Shield and Fabricating Method ThereofApril 2024November 2024Allow700NoNo
18618420DISPLAY SUBSTRATE INCLUDING CONFIGURATION OF INSULATION LAYERS COVERING CONTACT PADS IN BONDING REGION, AND MANUFACTURING METHOD THEREOFMarch 2024February 2025Allow1110NoNo
18618109ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF INCLUDING VIA HOLE TO FACILITATE DEHYDROGENATION, DISPLAY PANEL, AND DISPLAY DEVICEMarch 2024April 2025Allow1311YesNo
18581727SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE INCLUDING COUPLING STRUCTURES FOR ELECTRICALLY INTERCONNECTING STACKED SEMICONDUCTOR SUBSTRATESFebruary 2024February 2025Allow1210NoNo
18434812METHOD FOR MANUFACTURING DISPLAY DEVICE INCLUDING SECOND INTERLAYER INSULATING LAYER OVERLAPPING ACTIVE LAYER OF DRIVING TRANSISTOR AND NOT OVERLAPPING ACTIVE LAYER OF SWITCHING TRANSISTORFebruary 2024January 2025Allow1210NoNo
18398981BACK SIDE ILLUMINATION IMAGE SENSORS AND ELECTRONIC DEVICE INCLUDING THE SAMEDecember 2023September 2024Allow900NoNo
18397915HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPSDecember 2023September 2024Allow900NoNo
18395414DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME INCLUDING CUTTING SUBSTRATE AND BLACK MATRIX AT TIP END OF BLOCKING LAYERDecember 2023September 2024Allow900YesNo
18544771SEMICONDUCTOR DEVICE COMPRISING PN JUNCTION DIODE AND SCHOTTKY BARRIER DIODEDecember 2023February 2025Allow1410NoNo
18536131METHODS AND APPARATUS INCLUDING ARRAY OF REACTION CHAMBERS OVER ARRAY OF CHEMFET SENSORS FOR MEASURING ANALYTESDecember 2023August 2024Allow900YesNo
18526395SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN CONTACT HAVING HEIGHT BELOW GATE STACKDecember 2023February 2025Allow1511NoNo
18520805DISPLAY DEVICE INCLUDING COLOR ABSORBING LAYER BETWEEN CAPPING AND BANK LAYERS FOR IMPROVING COLOR MATCHING, AND METHOD OF PROVIDING THE SAMENovember 2023August 2024Allow900YesNo
18506101HIGH ELECTRON MOBILITY TRANSISTOR INCLUDING CONDUCTIVE PLATE FILLING TRENCHES IN PASSIVATION LAYER, AND METHOD FOR FORMING THE SAMENovember 2023January 2025Allow1520NoNo
18387088DISPLAY PANEL WITH SUBSTRATE HAVING A THROUGH HOLE INCLUDING THEREIN A CONDUCTIVE PART AND A RESIN PART, A METHOD FOR MANUFACTURING THE SAME, AND A DISPLAY DEVICE INCLUDING THE DISPLAY PANELNovember 2023September 2024Allow1010NoNo
18382051DISPLAY PANEL INCLUDING DUMMY PIXELS IN A NON-DISPLAY AREAOctober 2023August 2024Allow1010NoNo
18380022HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPSOctober 2023December 2024Allow1420YesNo
18482025SEMICONDUCTOR DEVICE INCLUDING SOURCE PAD REGION AND DRAIN PAD REGION CONFIGURED TO IMPROVE CURRENT UNIFORMITY AND REDUCE RESISTANCEOctober 2023May 2024Allow700YesNo
18243096SEMICONDUCTOR DEVICE INCLUDING METAL INTERCONNECTIONS HAVING SIDEWALL SPACERS THEREON, AND METHOD FOR FABRICATING THE SAMESeptember 2023April 2024Allow800YesNo
18451486METHOD FOR TRANSFERRING BLOCKS FROM A DONOR SUBSTRATE ONTO A RECEIVER SUBSTRATE BY IMPLANTING IONS IN THE DONOR SUBSTRATE THROUGH A MASK, BONDING THE DONOR SUBSTRATE TO THE RECEIVER SUBSTRATE, AND DETACHING THE DONOR SUBSTRATE ALONG AN EMBRITTLEMENT PLANEAugust 2023April 2024Allow801YesNo
18357794FIN FIELD-EFFECT TRANSISTOR DEVICE HAVING HYBRID WORK FUNCTION LAYER STACKJuly 2023February 2024Allow700YesNo
18357044DISPLAY DEVICE INCLUDING CONNECTION WIRING PART LATERALLY ADJACENT TO DRIVING VOLTAGE WIRINGJuly 2023February 2024Allow700YesNo
18354218WHITE ORGANIC LIGHT-EMITTING DIODE DISPLAY SUBSTRATE INCLUDING SWITCHING TFT AND LIGHT-SHIELDING LAYER ARRANGED TO PREVENT NEGATIVE DRIFTJuly 2023February 2025Allow1920NoNo
18353017METHODS AND APPARATUS FOR MEASURING ANALYTES USING LARGE SCALE FET ARRAYSJuly 2023February 2024Allow700YesNo
18348990TRENCH-GATE FIELD EFFECT TRANSISTOR WITH IMPROVED ELECTRICAL PERFORMANCES AND CORRESPONDING MANUFACTURING PROCESSJuly 2023February 2024Allow800YesNo
18347013HEAT DISSIPATION STRUCTURES FOR THREE-DIMENSIONAL SYSTEM ON INTEGRATED CHIP STRUCTUREJuly 2023July 2024Allow1310YesNo
182070471D VERTICAL EDGE BLOCKING (VEB) VIA AND PLUGJune 2023January 2024Allow700YesNo
18312647CMOS FinFET Structures Including Work-Function Materials Having Different Proportions of Crystalline Orientations and Methods of Forming the SameMay 2023December 2023Allow700YesNo
18305816DISPLAY DEVICE INCLUDING SIDE TERMINAL DISPOSED ALONG AN INCLINED SIDE SURFACE THEREOF, AND METHOD OF MANUFACTURING THE SAMEApril 2023July 2024Allow1520NoNo
18138325Semiconductor Package With EMI Shield and Fabricating Method ThereofApril 2023December 2023Allow800YesNo
18193418DISPLAY DEVICE INCLUDING TRANSISTOR WITH VIAS CONTACTING ACTIVE LAYER THROUGH ETCH STOP LAYER, AND METHOD OF MANUFACTURING SAMEMarch 2023October 2023Allow700NoNo
18121646METHOD OF MANUFACTURING DISPLAY PANEL WITH CIRCUIT-LAYER STACK INCLUDING METAL, OXIDE, AND CAPPING LAYERS, AND DISPLAY PANEL MANUFACTURED BY THE SAMEMarch 2023October 2023Allow700NoNo
18178683DISPLAY DEVICE INCLUDING GALVANIC REACTION-PATTERNED ELECTRODES, AND METHOD OF MANUFACTURING THE SAMEMarch 2023October 2023Allow700YesNo
18110157ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF INCLUDING VIA HOLE TO FACILITATE DEHYDROGENATION, DISPLAY PANEL, AND DISPLAY DEVICEFebruary 2023December 2023Allow1010NoNo
18167651SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN CONTACT HAVING HEIGHT BELOW GATE STACKFebruary 2023September 2023Allow700YesNo
18103848DISPLAY APPARATUS COMPRISING DIFFERENT TYPES OF THIN FILM TRANSISTORS WITH COMPACT DESIGN AND METHOD FOR MANUFACTURING THE SAMEJanuary 2023August 2023Allow700NoNo
18150193DISPLAY DEVICE INCLUDING MULTI-LAYERED BUFFER LAYERJanuary 2023December 2023Allow1110YesNo
18089227HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPSDecember 2022July 2023Allow700YesNo
18076748DISPLAY APPARATUS WITH LIGHT-SHIELDING PORTION ADJOINING SUBSTRATE AND ANODE, MANUFACTURING METHOD FOR DISPLAY APPARATUS, AND ELECTRONIC DEVICEDecember 2022April 2025Allow2900YesNo
17972981DISPLAY DEVICE AND ELECTRONIC APPARATUS INCLUDING PIXEL DEFINING FILM AND REFELCTOR ABOVE AND OVER LIGHT REFLECTING SURFACE OF PIXEL DEFINING FILMOctober 2022October 2024Allow2430NoNo
17972010METHOD FOR MANUFACTURING DISPLAY PANEL INCLUDING PADS ON SIDE SURFACE THEREOF ADJACENT CONNECTION LINES HAVING REDUCED WIDTHSOctober 2022May 2023Allow700NoNo
17967319ORGANIC ELECTROLUMINESCENT DEVICE INCLUDING ARRANGEMENT OF CAPACITIVE ELECTRODE BETWEEN LAYER OF OTHER CAPACITIVE ELECTRODE AND LAYER OF GATE ELECTRODEOctober 2022September 2023Allow1100YesNo
18045106Chemical Sensor Array Having Multiple Sensors Per WellOctober 2022May 2023Allow700YesNo
17959852SEMICONDUCTOR DEVICE COMPRISING PN JUNCTION DIODE AND SCHOTTKY BARRIER DIODEOctober 2022September 2023Allow1210YesNo
17957151DISPLAY SUBSTRATE INCLUDING CONFIGURATION OF INSULATION LAYERS COVERING CONTACT PADS IN BONDING REGION, AND MANUFACTURING METHOD THEREOFSeptember 2022January 2024Allow1510NoNo
17956096METHOD OF MANUFACTURING DISPLAY DEVICE INCLUDING A FORMATION PROCESS OF A CONDUCTIVE FILM AND LASER CURING THE CONDUCTIVE FILM AND MANUFACTURING DEVICE FOR DISPLAY DEVICESeptember 2022May 2023Allow800YesNo
17951200METHOD OF MANUFACTURING DISPLAY PANEL WITH COLOR CONTROL LAYER INCLUDING WALL BASES HAVING REFLECTIVE LAYERS ON SIDEWALLS THEREOFSeptember 2022April 2023Allow700NoNo
17823696INTEGRATED SENSOR ARRAYS FOR BIOLOGICAL AND CHEMICAL ANALYSISAugust 2022May 2023Allow900YesNo
17899552OPTICAL DEVICE INCLUDING LID HAVING FIRST AND SECOND CAVITY WITH INCLINED SIDEWALLSAugust 2022March 2024Allow1920NoNo
17821840DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME, THE METHOD INCLUDING DEPOSITING DIFFERENT ELECTRODE PORTIONS BY MOVING A MASKAugust 2022June 2023Allow900YesNo
17820202METHODS AND APPARATUS FOR MEASURING ANALYTES USING LARGE SCALE FET ARRAYSAugust 2022March 2023Allow700YesNo
17888502SEMICONDUCTOR DEVICE INCLUDING METAL INTERCONNECTIONS HAVING SIDEWALL SPACERS THEREON, AND METHOD FOR FABRICATING THE SAMEAugust 2022July 2023Allow1110NoNo
17888515STRETCHABLE PIXEL ARRAY SUBSTRATEAugust 2022February 2025Allow3000NoNo
17815132DISPLAY PANEL INCLUDING VERNIER MARK FOR ALIGNING CONDUCTIVE ADHESIVE MEMBER, ELECTRONIC APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE ELECTRONIC APPARATUSJuly 2022July 2023Allow1201YesNo
17871067DISPLAY PANEL, DISPLAY DEVICE AND MANUFACTURING METHOD THEROF COMPRISING PATTERNING LIGHT-EMITTING LAYER IN OPENING REGIONJuly 2022October 2023Allow1520YesNo
17869659SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE INCLUDING COUPLING STRUCTURES FOR ELECTRICALLY INTERCONNECTING STACKED SEMICONDUCTOR SUBSTRATESJuly 2022November 2023Allow1611YesNo
17867491TRENCH-GATE FIELD EFFECT TRANSISTOR WITH IMPROVED ELECTRICAL PERFORMANCES AND CORRESPONDING MANUFACTURING PROCESSJuly 2022March 2023Allow800NoNo
17812598WHITE ORGANIC LIGHT-EMITTING DIODE DISPLAY SUBSTRATE INCLUDING SWITCHING TFT AND LIGHT-SHIELDING LAYER ARRANGED TO PREVENT NEGATIVE DRIFTJuly 2022April 2023Allow900NoNo
17852755FIN FIELD-EFFECT TRANSISTOR DEVICE HAVING HYBRID WORK FUNCTION LAYER STACKJune 2022October 2023Abandon1611NoNo
17839131PROCESS FOR MANUFACTURING MICROELECTROMECHANICAL DEVICES, IN PARTICULAR ELECTROACOUSTIC MODULESJune 2022September 2023Allow1501YesNo
17804927SEMICONDUCTOR DEVICE INCLUDING A FINFET STRUCTURE AND METHOD FOR FABRICATING THE SAMEJune 2022May 2024Allow2410YesNo
17749250OLED DISPLAY SUBSTRATE EXHIBITING IMPROVED BRIGHTNESS AND INCLUDING WHITE SUB-PIXEL UNIT OVERLAPPING PLURALITY OF SIGNAL LINESMay 2022May 2023Allow1210NoNo
17742499ARRAY SUBSTRATE WITH SUB-PIXELS INCLUDING POWER-SUPPLYING WIRE PORTIONS HAVING OPENINGS THEREBETWEEN AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANELMay 2022March 2023Allow1000NoNo
17720211DEVICE CHIP SCALE PACKAGE INCLUDING A PROTECTIVE LAYERApril 2022January 2024Allow2111YesNo
17711694DISPLAY APPARATUS INCLUDING COLOR-CONVERSION LAYER AND FILTER LAYER STACKED IN DIFFERENT INSULATING LAYERS, AND METHOD OF MANUFACTURING THE SAMEApril 2022March 2023Allow1100NoNo
17700376DISPLAY DEVICE INCLUDING DUMMY PIXELS IN A NON-DISPLAY AREAMarch 2022July 2023Allow1610YesNo
17695665DISPLAY DEVICE INCLUDING REFLECTIVE ELECTRODE ON BANK PATTERN CONFIGURED TO IMPROVE LUMINOUS EFFICIENCY, AND METHOD OF MANUFACTURING THE SAMEMarch 2022March 2025Allow3601NoNo
17694376DISPLAY DEVICE INCLUDING CONNECTION WIRING PART LATERALLY ADJACENT TO DRIVING VOLTAGE WIRINGMarch 2022March 2023Allow1200NoNo
17691237SEMICONDUCTOR DEVICE INCLUDING INNER CONDUCTIVE LAYER HAVING REGIONS OF DIFFERENT SURFACE ROUGHNESSMarch 2022June 2024Allow2800NoNo
17640547METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE INCLUDING INTEGRATING III-V DEVICE AND CMOS DEVICE, AND THE SEMICONDUCTOR DEVICE THEREOFMarch 2022May 2025Allow3810YesNo
17589896LIGHT-EMITTING DEVICE INCLUDING WIRINGS IN GROOVE STRUCTUREFebruary 2022March 2023Allow1300NoNo
17568284DISPLAY DEVICE WITH WINDOW HAVING STACK OF TRANSPARENT AND LIGHT-BLOCKING PATTERNS, AND METHOD OF MANUFACTURING THE SAMEJanuary 2022January 2025Allow3600YesNo
17560143DISPLAY DEVICE CONFIGURED TO PREVENT PROPAGATION OF CRACKS, AND METHOD OF REPAIRING SAMEDecember 2021February 2024Allow2601YesNo
17549910HALF-BRIDGE CIRCUIT PACKAGE STRUCTUREDecember 2021March 2025Allow3901NoNo
17644076METAL GATE PATTERNING FOR LOGIC AND SRAM IN NANOSHEET DEVICESDecember 2021September 2024Allow3301NoNo
17618763SEMICONDUCTOR DEVICE INCLUDING SUB-CELL DISPOSED AT CHIP CENTERDecember 2021September 2023Allow2100YesNo
17548305DISPLAY DEVICE INCLUDING GRAPHITE SHEETS PENETRATING MOLD SLOT PORTIONS FOR ENHANCED HEAT DISSIPATIONDecember 2021August 2024Allow3211NoNo
17539760MEMORY DEVICES HAVING VERTICAL TRANSISTORS IN STAGGERED LAYOUTSDecember 2021April 2024Allow2900YesNo
17538829SEMICONDUCTOR DEVICE WITH COOLER INCLUDING HEAT DISSIPATING SUBSTRATE HAVING A PLURALITY OF FINS BONDED TO REINFORCING PLATENovember 2021April 2024Allow2900YesNo
17534999DISPLAY APPARATUS INCLUDING AN ANTI-CRACK PROJECTIONNovember 2021June 2023Allow1810NoNo
17531282DISPLAY APPARATUS INCLUDING AUXILIARY SUB-PIXELS CONFIGURED TO IMPROVE LIGHT TRANSMITTANCE OF COMPONENT AREANovember 2021April 2025Allow4011NoNo
17521546DISPLAY DEVICE WITH PIXEL INCLUDING LIGHT BLOCKING PATTERN ON LIGHT EMITTING ELEMENTS, AND MANUFACTURING METHOD THEREOF.November 2021September 2024Allow3501NoNo
17518391MICRO-LED DISPLAY DEVICE INCLUDING HOLES AND WIRES CONFIGURED TO IMPROVE ASSEMBLING EFFICIENCYNovember 2021February 2025Allow3910YesNo
17608747DISPLAY SUBSTRATE INCLUDING CONNECTION LINE AND POWER LINE SURROUNDING DISPLAY AREA, PREPARATION METHOD THEREOF, AND DISPLAY DEVICENovember 2021January 2024Allow2700YesNo
17607602DRIVE CIRCUIT ARRAY SUBSTRATE INCLUDING WELL TAPS PROVIDED IN SUBSET THEREOF, DISPLAY DEVICE, AND ELECTRONIC APPARATUS.October 2021February 2024Allow2700YesNo
17513315DISPLAY DEVICE INCLUDING DUMMY PATTERN OVERLAPPING ACTIVE PATTERN AND METHOD OF PROVIDING THE SAMEOctober 2021August 2024Allow6011YesNo
17511596DISPLAY DEVICE INCLUDING GAP BETWEEN BANK AND LIGHT-EMITTING ELEMENT, AND MANUFACTURING METHOD THEREOFOctober 2021February 2025Allow4020YesNo
17511568DISPLAY DEVICE INCLUDING ACTIVE ELEMENT COMPRISING TFTS WITH GATE INSULATING LAYERS HAVING THICKNESSES OPTIMIZED TO MAINTAIN SUBTHRESHOLD SWING, AND MANUFACTURING METHOD THEREOF.October 2021June 2024Allow3200NoNo
17511508LIGHT SOURCE DEVICE, DISPLAY DEVICE AND MANUFACTURING METHOD OF LIGHT SOURCE DEVICEOctober 2021October 2024Abandon3501NoNo
17504613SEMICONDUCTOR PACKAGE INCLUDING PLURALITY OF SEMICONDUCTOR CHIPS ON COMMON CONNECTION STRUCTUREOctober 2021June 2023Allow2001YesNo
17486790DISPLAY SUBSTRATE INCLUDING ADDITIONAL INSULATING LAYER BETWEEN TRANSISTOR GATE AND ACTIVE LAYER FOR PREVENTING DARK SPOTS, PREPARATION METHOD THEREOF, AND DISPLAY APPARATUSSeptember 2021January 2024Allow2701NoNo
17483312Apparatus Having a Functional Structure Delimited by a Frame Structure and Method for Producing SameSeptember 2021October 2023Allow2520YesNo
17440450METHOD FOR TRANSFERRING BLOCKS FROM A DONOR SUBSTRATE ONTO A RECEIVER SUBSTRATE BY IMPLANTING IONS IN THE DONOR SUBSTRATE THROUGH A MASK, BONDING THE DONOR SUBSTRATE TO THE RECEIVER SUBSTRATE, AND DETACHING THE DONOR SUBSTRATE ALONG AN EMBRITTLEMENT PLANESeptember 2021May 2023Allow2000YesNo
17436985SEMICONDUCTOR DEVICE AND SOLID-STATE IMAGE SENSOR INCLUDING PIXEL SUBSTRATE JOINED WITH ANOTHER SUBSTRATESeptember 2021September 2024Allow3710NoNo
17462705DISPLAY DEVICE INCLUDING TEST ELEMENT GROUP, AND METHOD FOR INSPECTING DEFECT OF DISPLAY DEVICEAugust 2021October 2023Allow2501YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner GORDON, MATTHEW E.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
22
Examiner Affirmed
9
(40.9%)
Examiner Reversed
13
(59.1%)
Reversal Percentile
82.9%
Higher than average

What This Means

With a 59.1% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
58
Allowed After Appeal Filing
22
(37.9%)
Not Allowed After Appeal Filing
36
(62.1%)
Filing Benefit Percentile
62.6%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 37.9% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner GORDON, MATTHEW E - Prosecution Strategy Guide

Executive Summary

Examiner GORDON, MATTHEW E works in Art Unit 2892 and has examined 973 patent applications in our dataset. With an allowance rate of 74.9%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 27 months.

Allowance Patterns

Examiner GORDON, MATTHEW E's allowance rate of 74.9% places them in the 40% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by GORDON, MATTHEW E receive 1.97 office actions before reaching final disposition. This places the examiner in the 49% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by GORDON, MATTHEW E is 27 months. This places the examiner in the 73% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +1.0% benefit to allowance rate for applications examined by GORDON, MATTHEW E. This interview benefit is in the 19% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 22.9% of applications are subsequently allowed. This success rate is in the 30% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 20.2% of cases where such amendments are filed. This entry rate is in the 25% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 17.1% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 26% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 60.7% of appeals filed. This is in the 38% percentile among all examiners. Of these withdrawals, 35.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 41.6% are granted (fully or in part). This grant rate is in the 33% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 2.3% of allowed cases (in the 76% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.4% of allowed cases (in the 64% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.