USPTO Examiner TSENG CHENG YUAN - Art Unit 2182

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18434294Circuit and Method for Resource ArbitrationFebruary 2024February 2025Allow1310NoNo
18503869DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONSNovember 2023September 2024Allow1000NoNo
18386771SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONSNovember 2023December 2024Allow1310NoNo
18386407SYSTEMS AND METHODS TO STORE A TILE REGISTER PAIR TO MEMORYNovember 2023January 2025Allow1410NoNo
18385590APPARATUS AND METHOD FOR DIE-TO-DIE (D2D) INTERCONNECTSOctober 2023December 2024Allow1400NoNo
18377818DATA TRANSFER FOR NON-DOT PRODUCT COMPUTATIONS ON NEURAL NETWORK INFERENCE CIRCUITOctober 2023July 2024Allow1000NoNo
18373711MECHANISM TO AUTONOMOUSLY MANAGE SSDS IN AN ARRAYSeptember 2023August 2024Allow1110NoNo
18473614Mechanisms To Utilize Communication Fabric Via Multi-Port ArchitectureSeptember 2023December 2024Allow1500NoNo
18244655Scheduling Tasks in a ProcessorSeptember 2023October 2024Allow1310NoNo
18460497SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS INSTRUCTIONSSeptember 2023August 2024Allow1200NoNo
18238479SYNCHRONIZATION OF ASYMMETRIC PROCESSORS EXECUTING IN QUASI- DUAL PROCESSOR LOCK STEP COMPUTING SYSTEMSAugust 2023November 2024Allow1500NoNo
18455612EXCEPTION HANDLING METHOD AND RELATED APPARATUSAugust 2023November 2024Allow1500NoNo
18236584Avoiding Use of a Subarray of Configurable Units Having a DefectAugust 2023June 2024Allow1000NoNo
18453702METHOD AND APPARATUS FOR ACCELERATING GNN PRE-PROCESSINGAugust 2023November 2024Allow1500NoNo
18447226NEURAL PROCESSORAugust 2023January 2024Allow510NoNo
18364872ACCELERATOR, METHOD OF OPERATING AN ACCELERATOR, AND ELECTRONIC DEVICE INCLUDING AN ACCELERATORAugust 2023July 2024Allow1100NoNo
18227092COMPUTATIONAL MEMORYJuly 2023November 2023Allow310NoNo
18356455EFFICIENT INSTRUCTION TRANSLATION METHOD, AND PROCESSORJuly 2023October 2024Allow1500NoNo
18353345PREDICTING A LOAD VALUE FOR A SUBSEQUENT LOAD OPERATIONJuly 2023October 2024Allow1500NoNo
18220048METHODS AND SYSTEMS FOR INTER-PIPELINE DATA HAZARD AVOIDANCEJuly 2023September 2023Allow300NoNo
18219535MICROKERNEL-BASED SOFTWARE OPTIMIZATION OF NEURAL NETWORKSJuly 2023October 2024Allow1510YesNo
18347964INSTRUCTION PREFETCH BASED ON THREAD DISPATCH COMMANDSJuly 2023June 2024Allow1200NoNo
18212979OPERATION METHOD OF AN ACCELERATOR AND SYSTEM INCLUDING THE SAMEJune 2023August 2024Allow1410YesNo
18202851INTERFACE CONVERSION CIRCUITRY FOR UNIVERSAL CHIPLET INTERCONNECT EXPRESS (UCIe)May 2023January 2025Allow2010YesNo
18202190FREQUENCY PATTERN FOR REDUCING PARASITIC INTERACTIONS IN A QUBIT GRIDMay 2023March 2024Allow1000NoNo
18199572Low Latency Nodes Fusion in a Reconfigurable Data ProcessorMay 2023August 2024Allow1500NoNo
18320133SYSTEM AND METHOD FOR INCREASING UTILIZATION OF DOT-PRODUCT BASED NEURAL NETWORK ACCELERATORMay 2023July 2024Allow1410NoNo
18139286GLOBAL DEDUPLICATIONApril 2023November 2024Allow1810NoNo
18134419MULTI LEVEL LOOPBACK TO ENABLE AUTOMATED TESTING OF STANDALONE CONNECTIVITY CONTROLLERApril 2023September 2024Allow1700NoNo
18248835PRIMARY IP KVM DEVICESApril 2023November 2024Allow1910YesNo
18126574COMPUTATIONAL MEMORYMarch 2023December 2024Abandon2010NoNo
18120601STREAMING ADDRESS GENERATIONMarch 2023May 2024Allow1410NoNo
18116177METHOD FOR HANDLING CONFIGURATION DATA FOR AN INTERCONNECTION PROTOCOL WITHIN HIBERNATE OPERATION, CONTROLLER, AND ELECTRONIC DEVICEMarch 2023April 2024Allow1300NoNo
18171068Control Calibration Timing to Avoid Memory Write Blackout PeriodFebruary 2023July 2024Allow1710NoNo
18169271EFFICIENT MEMORY LEAK DETECTION IN DATABASE SYSTEMSFebruary 2023March 2024Allow1300NoNo
18168597AI SYNAPTIC COPROCESSORFebruary 2023September 2023Allow700YesNo
18156704ARITHMETIC UNIT FOR DEEP LEARNING ACCELERATIONJanuary 2023September 2024Allow2020YesNo
18155294INPUT/OUTPUT QUEUE HINTING FOR RESOURCE UTILIZATIONJanuary 2023February 2024Allow1300NoNo
18087661QUASI-VOLATILE SYSTEM-LEVEL MEMORYDecember 2022May 2024Allow1710NoNo
18082415ASYNCHRONOUS DISTRIBUTED DATA FLOW FOR MACHINE LEARNING WORKLOADSDecember 2022May 2024Allow1720YesNo
18057084QUANTUM READOUT ERROR MITIGATION BY STOCHASTIC MATRIX INVERSIONNovember 2022January 2024Allow1410YesNo
17988564Devices, Methods, and System for Reducing Latency in Remote Direct Memory Access SystemNovember 2022July 2024Allow2020YesNo
17984722SYSTEM AND METHOD FOR ENERGY-EFFICIENT IMPLEMENTATION OF NEURAL NETWORKSNovember 2022May 2024Allow1820YesNo
18052086PROCESSING APPARATUS AND INFERENCE SYSTEMNovember 2022September 2023Allow1110NoNo
18051345STORAGE SYSTEM PORT INFORMATION MANAGEMENTOctober 2022July 2024Allow2120NoNo
18048203LARGE MODEL SUPPORT IN DEEP LEARNINGOctober 2022December 2023Allow1410YesNo
17963773STATUS CHECK USING CHIP ENABLE PINOctober 2022August 2024Allow2230YesNo
17958503METHOD AND APPARATUS FOR VECTOR SORTING USING VECTOR PERMUTATION LOGICOctober 2022July 2023Allow1000NoNo
17935912SYSTEMS AND METHODS FOR HARDWARE-BASED ASYNCHRONOUS PERSISTENCESeptember 2022March 2024Allow1700NoNo
17932084Circuit and Method for Resource ArbitrationSeptember 2022November 2023Allow1400NoNo
17944454NEURAL NETWORK ACCELERATOR AND OPERATING METHOD THEREOFSeptember 2022December 2023Allow1510NoNo
17802117DYNAMIC COMPRESSION FOR MULTIPROCESSOR PLATFORMS AND INTERCONNECTSAugust 2022February 2024Allow1810NoNo
17889368Video processor for handling irregular inputAugust 2022October 2023Allow1400YesNo
17887906SHARED BUFFER FOR MULTI-OUTPUT DISPLAY SYSTEMSAugust 2022November 2023Allow1510NoNo
17886855METHOD AND APPARATUS FOR EFFICIENT PROGRAMMABLE INSTRUCTIONS IN COMPUTER SYSTEMSAugust 2022January 2024Allow1810NoNo
17885242WAFER-ON-WAFER FORMED MEMORY AND LOGIC FOR GENOMIC ANNOTATIONSAugust 2022October 2023Allow1400NoNo
17879318MICROPROCESSOR WITH PREDICTION UNIT PIPELINE THAT PROVIDES A NEXT FETCH ADDRESS AT A RATE OF ONE PER CLOCK CYCLEAugust 2022September 2023Allow1400NoNo
17815720STORAGE DEVICE SUPPORTING MULTI-HOST AND OPERATION METHOD THEREOFJuly 2022April 2024Allow2110NoNo
17814817RECONFIGURABLE NEURAL ENGINE WITH EXTENSIBLE INSTRUCTION SET ARCHITECTUREJuly 2022February 2024Allow1910YesNo
17864135CONTROL ALGORITHM GENERATOR FOR NON-VOLATILE MEMORY MODULEJuly 2022December 2023Allow1700NoNo
17805681SYSTEMS AND METHODS FOR PROCESSING AN IMAGEJune 2022June 2023Allow1300NoNo
17824704UPGRADE FOR SYSTEM WITH DIFFERING CAPACITIESMay 2022July 2023Allow1400NoNo
17779119SYSTEMS AND METHODS TO UPDATE ADD-ON CARDS FIRMWARE AND COLLECT HARDWARE INFORMATION ON ANY SERVERS WITH ANY OS INSTALLED OR BARE-METAL SERVERSMay 2022January 2023Allow800NoNo
17748954Converting a Stream of Data Using a Lookaside BufferMay 2022January 2024Allow2010NoNo
17746862SCHEDULING TASKS USING TARGETED PIPELINESMay 2022February 2024Allow2120NoNo
17738909ASYNCHRONOUS DISTRIBUTED DATA FLOW FOR MACHINE LEARNING WORKLOADSMay 2022October 2022Allow510YesNo
17738867Switch for Routing Data in an Array of Functional Configurable UnitsMay 2022April 2023Allow1100NoNo
17737936Defect Avoidance in a Multidimensional Array of Functional Configurable UnitsMay 2022April 2023Allow1200NoNo
17734908MECHANISM TO AUTONOMOUSLY MANAGE SSDS IN AN ARRAYMay 2022June 2023Allow1300NoNo
17732766MULTI-PROCESSOR SYNCHRONIZATIONApril 2022December 2023Allow1910YesNo
17718920DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONSApril 2022August 2023Allow1600NoNo
17717302ACCELERATOR, METHOD OF OPERATING THE ACCELERATOR, AND DEVICE INCLUDING THE ACCELERATORApril 2022May 2024Allow2530YesNo
17713176NEURAL PROCESSING UNIT (NPU) DIRECT MEMORY ACCESS (NDMA) MEMORY BANDWIDTH OPTIMIZATIONApril 2022July 2023Allow1510NoNo
17708003METHOD FOR TRANSMITTING HIGH BANDWIDTH CAMERA DATA THROUGH SERDES LINKSMarch 2022December 2023Allow2000NoNo
17754189ATOMIC RANGE COMPARE AND MODIFY OPERATIONSMarch 2022August 2023Allow1700NoNo
17642673PROCESSOR EMBEDDED WITH SMALL INSTRUCTION SETMarch 2022February 2024Abandon2310NoNo
17641036SYSTEM AND METHOD OF PARTIAL COMPILATION WITH VARIATIONAL ALGORITHMS FOR QUANTUM COMPUTERSMarch 2022September 2023Allow1800NoNo
17685987MEMORY DEVICE INCLUDING PROCESSING CIRCUIT, AND ELECTRONIC DEVICE INCLUDING SYSTEM ON CHIP AND MEMORY DEVICEMarch 2022August 2023Allow1710YesNo
17672253SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS INSTRUCTIONSFebruary 2022April 2023Allow1400YesNo
17592233COHERENT AGENTS FOR MEMORY ACCESSFebruary 2022August 2024Allow3040YesYes
17592010METHOD OF SYSTEM FOR GENERATING A CLUSTER INSTRUCTION SETFebruary 2022August 2023Allow1810YesNo
17649703Dynamic Port Allocation In PCIe Bifurcation SystemFebruary 2022June 2023Allow1610YesNo
17586767EFFICIENT AND CONCURRENT MODEL EXECUTIONJanuary 2022November 2023Allow2120YesNo
17648884SYSTEM AND METHOD FOR DEVICE MANAGEMENT OF INFORMATION HANDLING SYSTEMS USING CRYPTOGRAPHIC BLOCKCHAIN TECHNOLOGYJanuary 2022July 2024Allow3020NoNo
17582474METHOD FOR VIDEO PROCESSING USING A BUFFERJanuary 2022June 2023Allow1710NoNo
17582904DATA STRUCTURE DESCRIPTORS FOR DEEP LEARNING ACCELERATIONJanuary 2022March 2023Allow1400NoNo
17576872ADAPTIVE INTERFACE HIGH AVAILABILITY STORAGE DEVICEJanuary 2022January 2024Allow2530YesNo
17573556INSTRUCTIONS FOR VECTOR MULTIPLICATION OF UNSIGNED WORDS WITH ROUNDINGJanuary 2022March 2023Allow1400YesNo
17563999COMPUTATIONAL STORAGE DRIVE USING FPGA IMPLEMENTED INTERFACEDecember 2021March 2024Abandon2620NoNo
17563855OPTIMIZING STORAGE SYSTEM UPGRADES TO PRESERVE RESOURCESDecember 2021April 2024Allow2800NoNo
17556376MEMORY APPLIANCE COUPLINGS AND OPERATIONSDecember 2021May 2024Allow2940NoNo
17553525Multiple Pin Configurations of Memory DevicesDecember 2021June 2024Allow3040NoNo
17551781SIGNAL ENCODING METHOD AND A SEMICONDUCTOR DEVICE TO GENERATE AN OPTIMAL TRANSITION CODE IN A MULTI-LEVEL SIGNALING SYSTEMDecember 2021July 2023Allow1910YesNo
17549434Modular Control in a Quantum Computing SystemDecember 2021December 2023Allow2410YesNo
17544740STREAM ENGINE WITH ELEMENT PROMOTION AND DECIMATION MODESDecember 2021August 2023Allow2010NoNo
17536851DYNAMIC PRECISION BIT STRING ACCUMULATIONNovember 2021June 2023Allow1810YesNo
17531140INPUT/OUTPUT SEQUENCER INSTRUCTION SET PROCESSINGNovember 2021August 2023Allow2120YesNo
17455070DATA PROCESSING SYSTEM HAVING DISTRUBUTED REGISTERSNovember 2021June 2023Allow1820NoNo
17523633Queues for Inter-Pipeline Data Hazard AvoidanceNovember 2021February 2023Allow1500NoNo
17512032Multi-Channel Communications Between Controllers In A Storage SystemOctober 2021February 2023Allow1500YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner TSENG, CHENG YUAN.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
5.2%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
12
Allowed After Appeal Filing
10
(83.3%)
Not Allowed After Appeal Filing
2
(16.7%)
Filing Benefit Percentile
95.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 83.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner TSENG, CHENG YUAN - Prosecution Strategy Guide

Executive Summary

Examiner TSENG, CHENG YUAN works in Art Unit 2182 and has examined 309 patent applications in our dataset. With an allowance rate of 93.5%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 20 months.

Allowance Patterns

Examiner TSENG, CHENG YUAN's allowance rate of 93.5% places them in the 81% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by TSENG, CHENG YUAN receive 1.53 office actions before reaching final disposition. This places the examiner in the 28% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by TSENG, CHENG YUAN is 20 months. This places the examiner in the 92% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +6.4% benefit to allowance rate for applications examined by TSENG, CHENG YUAN. This interview benefit is in the 34% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 27.4% of applications are subsequently allowed. This success rate is in the 48% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 52.5% of cases where such amendments are filed. This entry rate is in the 78% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 40.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 37% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 92.3% of appeals filed. This is in the 84% percentile among all examiners. Of these withdrawals, 25.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 9.5% are granted (fully or in part). This grant rate is in the 8% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.3% of allowed cases (in the 56% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 14% percentile). This examiner rarely issues Quayle actions compared to other examiners. Allowances typically come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.