USPTO Examiner SANDIFER MATTHEW D - Art Unit 2182

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19005765CALCULATOR CAPABLE OF OUTPUTTING RESULTS BASED ON HANDWRITTEN FORMULASDecember 2024April 2025Allow410NoNo
18892280PROCESSING DEVICE USING DYNAMIC BIT SHIFTSeptember 2024December 2024Allow300YesNo
18892274PROCESSING DEVICE USING HETEROGENEOUS FORMAT INPUTSeptember 2024March 2025Allow610NoNo
18833896DYNAMIC MAXIMAL CLIQUE ENUMERATION DEVICE AND METHOD BASED ON FPGA WITH HBMJuly 2024March 2025Allow800YesNo
18746561PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDINGJune 2024April 2025Allow1010NoNo
18587519SYSTEMS AND METHODS EMPLOYING UNIQUE DEVICE FOR GENERATING RANDOM SIGNALS AND METERING AND ADDRESSING, E.G., UNUSUAL DEVIATIONS IN SAID RANDOM SIGNALSFebruary 2024June 2025Allow1610NoNo
18426504MECHANISM TO PERFORM SINGLE PRECISION FLOATING POINT EXTENDED MATH OPERATIONSJanuary 2024April 2025Abandon1420NoNo
18408296MULTIPLY ACCUMULATE (MAC) UNIT WITH SPLIT ACCUMULATORJanuary 2024March 2024Allow300YesNo
18401571RECONFIGURABLE ARITHMETIC ENGINE CIRCUITDecember 2023August 2024Allow800YesNo
18528086RESISTIVE AND DIGITAL PROCESSING CORESDecember 2023October 2024Allow1000NoNo
18523615SYSTEMS AND METHODS FOR PERFORMING MATRIX MULTIPLICATION WITH A PLURALITY OF PROCESSING ELEMENTSNovember 2023March 2024Allow400YesNo
18492016METHODS FOR MULTIPLYING MATRICES USING A PLURALITY OF CHIPLETSOctober 2023January 2024Allow300NoNo
18372737Look Ahead NormaliserSeptember 2023September 2024Allow1110NoNo
18474129FINE-GRAINED SPARSITY COMPUTATIONS IN SYSTOLIC ARRAYSeptember 2023August 2024Allow1110NoNo
18242603A Multiplier CircuitSeptember 2023August 2024Allow1110NoNo
18241977METHOD AND APPARATUS FOR USE IN THE DESIGN AND MANUFACTURE OF INTEGRATED CIRCUITSSeptember 2023August 2024Allow1110NoNo
18227835COMPUTATIONAL MEMORY FOR SORTING MULTIPLE DATA STREAMS IN PARALLELJuly 2023May 2024Abandon910NoNo
18356634EVALUATING QUANTUM COMPUTING CIRCUITS IN VIEW OF THE RESOURCE COSTS OF A QUANTUM ALGORITHMJuly 2023July 2024Allow1210YesNo
18216926MIRRORING MATRICES FOR BATCHED CHOLESKY DECOMPOSITION ON A GRAPHIC PROCESSING UNITJune 2023May 2024Allow1010YesNo
18336813ASCII-SEEDED RANDOM NUMBER GENERATORJune 2023February 2025Allow2020YesNo
18335274OPTIMIZATION PROBLEM SOLVING CALCULATION APPARATUSJune 2023April 2024Allow1010YesNo
18324335Composing Arbitrary Convolutional Neural Network Models from a Fixed Set of Duplicate Pipelined ComponentsMay 2023August 2023Allow300YesNo
18132962PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDINGApril 2023March 2024Allow1110YesNo
18125190Multiple Mode Arithmetic CircuitMarch 2023February 2024Allow1010NoNo
18111468LOW LATENCY MATRIX MULTIPLY UNITFebruary 2023October 2023Allow810YesNo
18083012BIT MATRIX MULTIPLICATIONDecember 2022March 2024Allow1510NoNo
17987020METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MULTIPLICATIONNovember 2022March 2024Allow1620YesNo
18045577Execution Circuitry for Floating-Point Power OperationOctober 2022June 2024Allow2010YesNo
17891389Predicting Compression Ratio of Data with Compressible DecisionAugust 2022November 2023Allow1520YesNo
17875747Look Ahead NormaliserJuly 2022May 2023Allow900YesNo
17874454COMPUTATIONAL MEMORY FOR SORTING MULTIPLE DATA STREAMS IN PARALLELJuly 2022May 2024Allow2210YesNo
17873862SPLIT AND DUPLICATE RIPPLE CIRCUITSJuly 2022March 2023Allow800YesNo
17839905METHOD AND APPARATUS FOR EFFICIENT BINARY AND TERNARY SUPPORT IN FUSED MULTIPLY-ADD (FMA) CIRCUITSJune 2022July 2023Allow1310YesNo
17825103ASCII-SEEDED RANDOM NUMBER GENERATORMay 2022February 2023Allow800YesNo
17742581OPTIMIZED COMPUTE HARDWARE FOR MACHINE LEARNING OPERATIONSMay 2022February 2025Allow3310NoNo
17742245Synthetic Scaling Applied to Shared Neural NetworksMay 2022April 2023Allow1110YesNo
17660688Execution Unit for Evaluating Functions Using Newton Raphson IterationsApril 2022August 2023Allow1500YesNo
17724253MULTIPLICATION AND ACCUMULATION (MAC) OPERATORApril 2022November 2023Allow1920YesNo
17702244CLASSICALLY-BOOSTED QUANTUM OPTIMIZATIONMarch 2022February 2023Allow1100YesNo
17687631Method and apparatus for true random number generator based on nuclear radiationMarch 2022June 2025Allow3910YesNo
17682167METHOD AND ARCHITECTURE FOR SERIAL LINK CHARACTERIZATION BY ARBITRARY SIZE PATTERN GENERATORFebruary 2022June 2025Allow3900YesNo
17673932SEMICONDUCTOR DEVICE INCLUDING MULTIPLIER CIRCUITFebruary 2022April 2023Allow1410NoNo
17651422MEMORY ARRAY STRUCTURE WITH DYNAMIC DIFFERENTIAL-REFERENCE BASED READOUT SCHEME FOR COMPUTING-IN-MEMORY APPLICATIONS, DYNAMIC DIFFERENTIAL-REFERENCE TIME-TO-DIGITAL CONVERTER FOR COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOFFebruary 2022June 2025Allow4000YesNo
17569801Multiple Mode Arithmetic CircuitJanuary 2022January 2023Allow1200YesNo
17520290Sparse Matrix Multiplier in Hardware and a Reconfigurable Data Processor Including SameNovember 2021April 2022Allow610YesNo
17513974FUSED MODULAR MULTIPLY AND ADD OPERATIONOctober 2021March 2025Allow4100NoNo
17484845INTEGRATED CIRCUITS WITH MACHINE LEARNING EXTENSIONSSeptember 2021April 2024Allow3010NoNo
17482995SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR DENSE/SPARSE LINEAR SYSTEM SOLVER ACCELERATORSeptember 2021September 2024Abandon3550YesNo
17480180REPURPOSED HEXADECIMAL FLOATING POINT DATA PATHSeptember 2021November 2023Allow2620YesNo
17439992MULTIPLY-ACCUMULATE CALCULATION DEVICE, LOGICAL CALCULATION DEVICE, NEUROMORPHIC DEVICE, AND MULTIPLY-ACCUMULATE CALCULATION METHODSeptember 2021May 2025Abandon4410NoNo
17434099DYNAMIC BIAS ANALOG VECTOR-MATRIX MULTIPLICATION OPERATION CIRCUIT AND OPERATION CONTROL METHOD THEREFORAugust 2021July 2024Allow3510NoNo
17407540PROCESSING-IN-MEMORY (PIM) DEVICES AND METHODS OF TESTING THE PIM DEVICESAugust 2021February 2023Allow1810NoNo
17401201SEMICONDUCTOR DEVICE CAPABLE OF PERFORMING IN-MEMORY PROCESSINGAugust 2021March 2025Allow4310NoNo
17400937Combinatorial Logic Circuits With FeedbackAugust 2021February 2024Allow3011NoNo
17399071Filter and Method with Multiplication Operation Approximation CapabilityAugust 2021May 2022Allow910YesNo
17393492HIGH THROUGHPUT LINEAR FEEDBACK SHIFT REGISTERAugust 2021June 2025Allow4710NoNo
17389128PERIPHERAL TOOLDUAL/QUAD-FRACTURABLE DIGITAL SIGNAL PROCESSING BLOCK FOR PROGRAMMABLE GATE ARCHITECTURESJuly 2021July 2024Allow3610YesNo
17384001TININESS DETECTIONJuly 2021August 2024Allow3611NoNo
17379089INTERLEAVED CIC FILTERJuly 2021December 2024Allow4110NoNo
17377743Multiplier and Adder in Systolic ArrayJuly 2021September 2024Allow3830YesNo
17363872OPTIMIZATION PROBLEM SOLVING CALCULATION APPARATUSJune 2021March 2023Allow2010NoNo
17358812INTEGRATED CIRCUIT FOR CONSTANT MULTIPLICATION AND DEVICE INCLUDING THE SAMEJune 2021December 2024Allow4230YesNo
17356743LOW-LOSS ARITHMETIC CIRCUIT AND OPERATING METHOD OF THE SAMEJune 2021September 2023Allow2710NoNo
17351250PREPARATION AND EXECUTION OF QUANTIZED SCALING ON INTEGRATED CIRCUITRYJune 2021September 2021Allow300YesNo
17335928Projection-Based Techniques For Updating Singular Value Decomposition In Evolving Data SetsJune 2021August 2024Allow3820YesNo
17334899Chopper Stabilized Bias Unit Element with Binary Weighted Charge Transfer CapacitorsMay 2021November 2022Allow1700NoNo
17298291SPARSE MATRIX STANDARDIZATION DEVICE, SPARSE MATRIX STANDARDIZATION METHOD, SPARSE MATRIX STANDARDIZATION PROGRAM, AND DATA STRUCTUREMay 2021January 2025Allow4410YesNo
17332540Method for Pulse-Based Convolution for Near-Sensor ProcessingMay 2021January 2025Allow4410NoNo
17331426PROCESSING-IN-MEMORY DEVICES HAVING MULTIPLICATION-AND-ACCUMULATION CIRCUITSMay 2021October 2024Allow4021YesNo
17296716Inverse Matrix Calculation Device and Inverse Matrix Calculation Processing MethodMay 2021December 2024Allow4310YesNo
17321925PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDINGMay 2021March 2023Allow2210NoNo
17319717MULTIPLICATION-AND-ACCUMULATION CIRCUITS AND PROCESSING-IN-MEMORY DEVICES HAVING THE SAMEMay 2021December 2024Allow4321YesNo
17317844Memory Bit Cell for In-Memory ComputationMay 2021February 2025Allow4500NoNo
17317349RANDOM NUMBER GENERATOR CIRCUITMay 2021July 2024Allow3810NoNo
17315710SYSTEM, METHOD, AND RECORDING MEDIUM FOR MIRRORING MATRICES FOR BATCHED CHOLESKY DECOMPOSITION ON A GRAPHIC PROCESSING UNITMay 2021June 2023Allow2550YesNo
17313224DYNAMIC ADJUSTMENT OF FLOATING POINT EXPONENT BIAS FOR EXPONENT COMPRESSIONMay 2021December 2024Allow4400YesNo
17241517NON-LINEAR FEEDBACK SHIFT REGISTERApril 2021November 2022Allow1800YesNo
17237989SYSTEM AND METHOD FOR AN OPTIMIZED WINOGRAD CONVOLUTION ACCELERATORApril 2021March 2025Abandon4760YesNo
17232075METHOD FOR COMBINING ANALOG NEURAL NET WITH FPGA ROUTING IN A MONOLITHIC INTEGRATED CIRCUITApril 2021November 2022Allow1900YesNo
17224643Operation Accelerator, Processing Method, and Related DeviceApril 2021January 2025Allow4610NoNo
17223324NEURAL NETWORK DEVICE FOR NEURAL NETWORK OPERATION, METHOD OF OPERATING NEURAL NETWORK DEVICE, AND APPLICATION PROCESSOR INCLUDING NEURAL NETWORK DEVICEApril 2021March 2025Allow4710YesNo
17282675OPTIMAL METASTABILITY-CONTAINING SORTING VIA PARALLEL PREFIX COMPUTATIONApril 2021May 2023Allow2510NoNo
17216736COMPUTER-READABLE RECORDING MEDIUM RECORDING ARITHMETIC PROCESSING PROGRAM, ARITHMETIC PROCESSING METHOD, AND ARITHMETIC PROCESSING DEVICEMarch 2021August 2024Abandon4110NoNo
17214526INTEGRATED CIRCUITS WITH MACHINE LEARNING EXTENSIONSMarch 2021April 2023Allow2410NoNo
17212474NEURAL NETWORK DEVICE FOR NEURAL NETWORK OPERATION, OPERATING METHOD OF THE NEURAL NETWORK DEVICE, AND APPLICATION PROCESSOR INCLUDING THE SAMEMarch 2021April 2024Allow3730YesNo
17279096SECURE RIGHT SHIFT COMPUTATION SYSTEM, SECURE DIVISION SYSTEM, METHODS THEREFOR, SECURE COMPUTATION APPARATUS, AND PROGRAMMarch 2021March 2025Allow4811YesNo
17210293LOW LATENCY MATRIX MULTIPLY UNITMarch 2021October 2022Allow1900YesNo
17209680ACTIVELY STABILIZED RANDOM NUMBER GENERATORMarch 2021April 2024Allow3710YesNo
17198448COMPUTATION SYSTEM WITH A PLURALITY OF COMPARATORS AND A GLOBAL CIRCUITMarch 2021August 2024Allow4110NoNo
17197359Analog Adders For Multi-bit MAC Arrays In Reconfigurable Analog Based Neural NetworksMarch 2021August 2024Allow4210NoNo
17190417ERROR UNBIASED APPROXIMATE MULTIPLIER FOR NORMALIZED FLOATING-POINT NUMBERS AND IMPLEMENTATION METHOD OF ERROR UNBIASED APPROXIMATE MULTIPLIERMarch 2021May 2022Allow1420YesNo
17188951MULTIPLICATION AND ACCUMULATION (MAC) OPERATORMarch 2021October 2023Allow3100NoNo
17189137Look Ahead NormaliserMarch 2021April 2022Allow1300YesNo
17272439FUNCTION GENERATION APPARATUS, METHOD FOR GENERATING FUNCTION, AND STORAGE MEDIUMMarch 2021January 2025Allow4710NoNo
17180856Process for a Floating Point Dot Product Multiplier-AccumulatorFebruary 2021September 2023Allow3110YesNo
17175446NEURAL NETWORK SYSTEM WITH MULTIPLICATION AND ACCUMULATION(MAC) OPERATORFebruary 2021July 2023Allow2900YesNo
17175477MULTIPLICATION AND ACCUMULATION (MAC) OPERATORFebruary 2021October 2022Allow2000YesNo
17175559TRANSPOSING IN A MATRIX-VECTOR PROCESSORFebruary 2021September 2024Allow4310YesNo
17175497MULTIPLICATION AND ACCUMULATION (MAC) OPERATORFebruary 2021October 2022Allow2000YesNo
17173203FLEXIBLE-ACCESS INSTRUCTIONS FOR EFFICIENT ACCESS OF ML DATAFebruary 2021December 2023Allow3400YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner SANDIFER, MATTHEW D.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
4
Examiner Affirmed
3
(75.0%)
Examiner Reversed
1
(25.0%)
Reversal Percentile
37.6%
Lower than average

What This Means

With a 25.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
10
Allowed After Appeal Filing
3
(30.0%)
Not Allowed After Appeal Filing
7
(70.0%)
Filing Benefit Percentile
42.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 30.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner SANDIFER, MATTHEW D - Prosecution Strategy Guide

Executive Summary

Examiner SANDIFER, MATTHEW D works in Art Unit 2182 and has examined 505 patent applications in our dataset. With an allowance rate of 92.3%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 25 months.

Allowance Patterns

Examiner SANDIFER, MATTHEW D's allowance rate of 92.3% places them in the 78% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by SANDIFER, MATTHEW D receive 1.19 office actions before reaching final disposition. This places the examiner in the 20% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by SANDIFER, MATTHEW D is 25 months. This places the examiner in the 65% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +11.9% benefit to allowance rate for applications examined by SANDIFER, MATTHEW D. This interview benefit is in the 51% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.4% of applications are subsequently allowed. This success rate is in the 75% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 53.9% of cases where such amendments are filed. This entry rate is in the 75% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 6% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 66.7% of appeals filed. This is in the 43% percentile among all examiners. Of these withdrawals, 37.5% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 16.7% are granted (fully or in part). This grant rate is in the 9% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 1.0% of allowed cases (in the 68% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.9% of allowed cases (in the 55% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.