USPTO Examiner NGUYEN KHAI M - Art Unit 2845

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19292095ARITHMETIC ENCODER FOR ARITHMETICALLY ENCODING AND ARITHMETIC DECODER FOR ARITHMETICALLY DECODING A SEQUENCE OF INFORMATION VALUES, METHODS FOR ARITHMETICALLY ENCODING AND DECODING A SEQUENCE OF INFORMATION VALUES AND COMPUTER PROGRAM FOR IMPLEMENTING THESE METHODSAugust 2025October 2025Allow200NoNo
19292047ARITHMETIC ENCODER FOR ARITHMETICALLY ENCODING AND ARITHMETIC DECODER FOR ARITHMETICALLY DECODING A SEQUENCE OF INFORMATION VALUES, METHODS FOR ARITHMETICALLY ENCODING AND DECODING A SEQUENCE OF INFORMATION VALUES AND COMPUTER PROGRAM FOR IMPLEMENTING THESE METHODSAugust 2025October 2025Allow200NoNo
19195291METHODS AND SYSTEMS FOR CALIBRATING A TIME-INTERLEAVED ANALOG TO DIGITAL CONVERTER (TIADC)April 2025July 2025Allow200NoNo
18890849DECODING METHOD FOR REDUCING INFLUENCE OF NOISE OF POWER SIGNAL LINE AND DECODING CIRCUITSeptember 2024March 2026Allow1800NoNo
18882680BUILDING SYSTEM WITH BROKERING ARCHITECTURE TO PROVIDE TIMESERIES COMPRESSION AND EXTENSIONSSeptember 2024November 2024Allow200NoNo
18826215SAMPLING SYSTEM WITH SETTLING ERROR CANCELLATIONSeptember 2024March 2026Allow1800NoNo
18822479CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER WITH REDUCED INTER-CELL INTERFERENCESeptember 2024March 2026Allow1800NoNo
18801968VARIABLE LENGTH CODING DEVICE AND MEMORY SYSTEMAugust 2024February 2026Allow1800NoNo
18774239SYSTEM AND METHOD FOR DIGITAL COMPENSATION OF TIMING SKEW MISMATCH IN TIME INTERLEAVED ANALOG TO DIGITAL CONVERTERSJuly 2024March 2026Allow2000NoNo
18767218ANALOG-TO-DIGITAL CONVERTER, SYSTEM-ON-CHIP AND ELECTRONIC CONTROL SYSTEMJuly 2024February 2026Allow1900NoNo
18764702Digital-to-analog conversion apparatus and method having signal calibration mechanismJuly 2024February 2026Allow1900NoNo
18760555DIRECT DIGITAL SYNTHESIS CIRCUIT WITH MULTIPLE DIGITAL TO ANALOG CONVERTERS AND MULTI-MODE MIXERJuly 2024October 2025Allow1600NoNo
18745800Stable Low-Power Analog-to-Digital Converter (ADC) Reference VoltageJune 2024March 2026Allow2110NoNo
18745812Arithmetic Encoders, Arithmetic Decoders, Video Encoder, Video Decoder, Methods for Encoding, Methods for Decoding and Computer ProgramJune 2024February 2026Allow2000NoNo
18743288METHOD FOR MEASURING DAC NONLINEARITY ERROR BASED ON PSEUDO-RANDOM SEQUENCEJune 2024February 2026Allow2000NoNo
18738828Offset Reduction in Power Management SystemsJune 2024February 2026Allow2000NoNo
18716885METHOD AND SYSTEM FOR GENERATING CLOCK SIGNAL OF 12S AUDIO BUS, AND DAC CIRCUITJune 2024February 2026Allow2000NoNo
18678127POWER SUPPLY-BASED COMPENSATION FOR DIE THERMAL SENSINGMay 2024January 2026Allow2000NoNo
18675877MULTIPART NUMERICAL ENCODINGMay 2024November 2025Allow1800NoNo
18672806Adaptive Power Tuning in a Successive Approximation Analog-to-Digital ConverterMay 2024November 2025Allow1800NoNo
18671042TRACK-AND-HOLD CIRCUIT HAVING PRE-CHARGING MOSFET CAPACITOR THEREOF FOR SHORTENING WAKE-UP DELAY TIMEMay 2024October 2025Allow1700NoNo
18671175POWER OPTIMIZED SIGNAL CHAIN FOR LOW OFFSET DRIFTMay 2024November 2025Allow1800NoNo
18667343SEMICONDUCTOR DEVICEMay 2024November 2025Allow1800NoNo
18666180ANALOG-TO-DIGITAL CONVERTER AND OFFSET CORRECTION METHOD THEREOFMay 2024October 2025Allow1700NoNo
18663083SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND OPERATING METHOD THEREOFMay 2024March 2026Allow2210NoNo
18663059SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND COMPARISON METHODMay 2024November 2025Allow1800NoNo
18658820ANALOG-TO-DIGITAL CONVERSIONMay 2024October 2025Allow1800NoNo
18649952Autonomous Synchronization Architecture for Massively Time-Interleaved Analog to Digital ConvertersApril 2024October 2025Allow1800NoNo
18641803METHODS AND SYSTEMS FOR SYNCHRONIZING AN ANALOG TO DIGITAL CONVERTERApril 2024December 2025Allow2000NoNo
18639349STRONGARM COMPARATOR AND ASYNCHRONOUS SAR ADCApril 2024October 2025Allow1800NoNo
18635047DIGITAL CORRECTION METHOD FOR DYNAMIC RANGE EXPANSION OF MULTIPLE ADCSApril 2024August 2025Allow1600NoNo
18699990CONVERSION DEVICE, CONVERSION METHOD, REVERSE CONVERSION DEVICE, REVERSE CONVERSION METHOD, AND PROGRAMApril 2024December 2025Allow2000NoNo
18629483Fault Protected Signal Splitter ApparatusApril 2024March 2025Allow1110NoNo
18612301SUCCESSIVE APPROXIMATION TYPE A/D CONVERTERMarch 2024September 2025Allow1800NoNo
18611399Current Generation Architecture for an Implantable Stimulator DeviceMarch 2024October 2024Allow700NoNo
18604432DYNAMIC CONTENT ENCODINGMarch 2024November 2025Allow2010NoNo
18596913ANALOG-TO-DIGITAL CIRCUIT AND OPERATION METHOD THEREOFMarch 2024November 2025Allow2000NoNo
18591676ANALOG-TO-DIGITAL CONVERTER WITH INSTABILITY RECOVERY CIRCUITFebruary 2024September 2025Allow1900NoNo
18584598CURRENT-TO-DIGITAL CONVERTER WITH WIDE DYNAMIC RANGEFebruary 2024August 2025Allow1700NoNo
18433108PROPAGATION DELAY COMPENSATION AND INTERPOLATION FILTERFebruary 2024November 2024Allow900NoNo
18429541TIME-TO-DIGITAL CONVERTER CIRCUITFebruary 2024August 2025Allow1900NoNo
18426071SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER TO GENERATE DIGITAL OUTPUT FROM VECTOR-BY-MATRIX MULTIPLICATION ARRAYJanuary 2024October 2025Allow2110NoNo
18419789METHOD FOR PROCESSING INPUT VARIABLES BY MEANS OF A PROCESSING DEVICE COMPRISING AT LEAST TWO FIELD-EFFECT TRANSISTORS, DEVICE FOR EXECUTING THE METHOD, COMPUTING DEVICE, AND USEJanuary 2024October 2025Allow2100NoNo
18414525AVS Architecture for SAR ADCJanuary 2024January 2026Allow2410NoNo
18412995DATA PROCESSING METHOD AND APPARATUSJanuary 2024September 2025Allow2010NoNo
18399223DIGITAL-TO-ANALOG CONVERTER CIRCUITRYDecember 2023August 2025Allow1900NoNo
18399379METHODS AND APPARATUS TO CALIBRATE ANALOG-TO-DIGITAL CONVERTERSDecember 2023August 2025Allow2000NoNo
18397835DYNAMIC CURRENT MISMATCH ACCUMULATION SCHEMES FOR DIGITAL-TO-ANALOG CONVERTERSDecember 2023July 2025Allow1900NoNo
18395853SEGMENTED CAPACITANCE CALIBRATION CIRCUIT APPLIED IN PURE CAPACITOR ARRAY STRUCTUREDecember 2023July 2025Allow1900NoNo
18396060GUARANTEED DATA COMPRESSIONDecember 2023November 2025Allow2310NoNo
18537559ANALOG-TO-DIGITAL CONVERTER WITH BUILT- IN CHARGE-BASED CAPACITANCE MEASUREMENTSDecember 2023September 2025Allow2100NoNo
18537037ANALOG-TO-DIGITAL CONVERTER AND SEMICONDUCTOR DEVICE HAVING THE SAMEDecember 2023February 2026Allow2610NoNo
18532565METHODS AND CIRCUITS FOR INNER-EYE TIMING CENTER DETECTION AND CLOCK PHASE ALIGNMENTDecember 2023August 2025Allow2100NoNo
18529134Companding Analog Current to Digital ConverterDecember 2023January 2025Allow1410NoNo
18519104Continuous-time delta-sigma modulatorNovember 2023July 2025Allow2000NoNo
18517241COMPENSATION DEVICE AND METHOD FOR EXCESS LOOP DELAY USING TIME DIVISION SWITCHING TECHNIQUENovember 2023October 2025Allow2310NoNo
18508010PARALLEL DECOMPRESSION OF COMPRESSED DATA STREAMSNovember 2023August 2025Allow2100NoNo
18495711MISMATCH SHAPING APPARATUS AND METHOD FOR BINARY CODED DIGITAL-TO-ANALOG CONVERTERSOctober 2023July 2025Allow2100NoNo
18495564CONFIGURABLE DIGITAL-TO-ANALOG CONVERTER CALIBRATIONOctober 2023November 2025Allow2510NoNo
18384001MISMATCH ERROR CALIBRATION METHOD AND APPARATUS OF A TIME INTERLEAVING DIGITAL-TO-ANALOG CONVERTEROctober 2023June 2025Allow1900NoNo
18494340ANALOG-TO-DIGITAL CONVERSION CIRCUIT AND OPERATING METHOD OF THE SAMEOctober 2023June 2025Allow2000NoNo
18378372METHOD AND APPARATUS FOR EVALUATING TRANSMISSION IMPAIRMENTS OF MULTIPLEXING CONVERTEROctober 2023January 2026Allow2700NoNo
18482333OFFSET CALIBRATION FOR AN ANALOG FRONT-END SYSTEM VARIABLE-GAIN AMPLIFIEROctober 2023September 2025Allow2310NoNo
18285217TESTING ADCsSeptember 2023October 2025Allow2410NoNo
18477471ANALOG ASSISTED FEED-FORWARD EQUALIZERSeptember 2023June 2025Allow2100NoNo
18477105SIGNAL PROCESSING METHOD AND APPARATUS THEREOFSeptember 2023May 2025Allow2000NoNo
18473288POLYSILICON RESISTORS, METHODS FOR MANUFACTURING THE SAME, AND SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTERSeptember 2023June 2025Allow2000NoNo
18466539SUCCESSIVE COMPARISON TYPE A/D CONVERTERSeptember 2023May 2025Allow2000NoNo
18465582SYSTEM AND METHOD FOR TRANSITION AWARE BINARY SWITCHING FOR DIGITAL-TO-ANALOG CONVERTERS (DACS)September 2023May 2025Allow2000NoNo
18464291METHOD OF CALIBRATING OUTPUT OF ADC AND ADC USING THE SAMESeptember 2023May 2025Allow2000NoNo
18244288SINGLE-END INPUT CONFIGURABLE DIFFERENTIAL SAR ANALOG-TO-DIGITAL CONVERTERSeptember 2023May 2025Allow2000NoNo
18463844DIGITAL-TO-ANALOG CONVERTER AND CORRESPONDING DIGITAL-TO-ANALOG CONVERSION METHODSeptember 2023May 2025Allow2000NoNo
18242984EFFICIENT CHARACTER COUNTING FOR VARIABLE LENGTH ENCODING FORMATSSeptember 2023May 2025Allow2100NoNo
18452458INTEGRATED CIRCUITAugust 2023August 2025Allow2410NoNo
18276977SUCCESSIVE APPROXIMATION REGISTER (SAR) DIGITAL ANALOG-TO-DIGITAL CONVERTER (ADC), AND ELECTRONIC DEVICEAugust 2023April 2025Allow2000NoNo
18366534Fault Protected Signal Splitter ApparatusAugust 2023September 2023Allow200NoNo
18276066ENCODING AND DECODING COMPLEX DATAAugust 2023July 2025Allow2410NoNo
18361649SYSTEM FOR AND METHOD OF ANALOG TO DIGITAL CONVERSION USING CALIBRATIONJuly 2023September 2025Allow2610NoNo
18357689CIRCUIT WITH TWO DIGITAL-TO-ANALOG CONVERTERS AND METHOD OF OPERATING SUCH THE CIRCUITJuly 2023July 2025Allow2410NoNo
18223861DIGITAL-TO-ANALOG CONVERTERJuly 2023April 2025Allow2100NoNo
18222172METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO REDUCE LEAKAGE CURRENT IN SAMPLING CIRCUITRYJuly 2023April 2025Allow2100NoNo
18220986METHODS AND DEVICES FOR ENTROPY CODING POINT CLOUDSJuly 2023August 2024Allow1310NoNo
18343151GLITCH-FREE ZERO-LATENCY AGC FOR SIGMA DELTA MODULATORJune 2023March 2025Allow2100NoNo
18343407Fault Protected Signal Splitter ApparatusJune 2023November 2023Allow510NoNo
18341141ANALOG-TO-DIGITAL CONVERTER METHOD AND CIRCUITRY WITH REDUCED METASTABILITY ERRORJune 2023April 2025Allow2100NoNo
18341237DIGITAL DC-DC CONTROLLERJune 2023July 2025Allow2401NoNo
18213716ANTENNA SYSTEMS FOR MULTI-RADIO COMMUNICATIONSJune 2023July 2025Allow2510NoNo
18207216Wheatstone Bridge High Accuracy Impedance Sensing Circuit with Increased Signal to Noise Ratio (SNR)June 2023September 2024Allow1500NoNo
18205250SYSTEM AND METHOD OF EXTENDING INPUT RANGE OF ANALOG TO DIGITAL CONVERTERJune 2023April 2025Allow2200NoNo
18326398DIGITAL-TO-ANALOG CONVERTER CIRCUIT WITH LINEAR PROGRAMMABLE GAIN STAGEMay 2023March 2025Allow2200NoNo
18201896DIGITAL DECIMATION FILTERING CIRCUIT OF ANALOG TO DIGITAL CONVERSION CIRCUITMay 2023January 2024Allow800NoNo
18201085TIME INTERLEAVED ANALOG-TO-DIGITAL CONVERTER WITH ADC UNIT CORRECTIONMay 2023March 2025Allow2200NoNo
18197949UNIT CAPACITOR-BASED RAMP ANALOG-TO-DIGITAL CONVERTERMay 2023February 2025Allow2100NoNo
18313414RETURN TO OPEN DAC WITH RESISTOR BYPASS ON RESETMay 2023June 2025Allow2510NoNo
18035805SYSTEM AND METHOD FOR AUTO-CONFIGURABLE DATA COMPRESSION FRAMEWORKMay 2023March 2025Allow2300NoNo
18143695Power Sensing CircuitMay 2023February 2024Allow900NoNo
18143778Source and sensor operative acoustic wave deviceMay 2023June 2024Allow1310NoNo
18143807ANALOG WORLD INTERFACING FOR AUTOMATED SYSTEMSMay 2023August 2024Allow1510NoNo
18310184OPERATING AN ANALOG-TO-DIGITAL CONVERTER DEVICEMay 2023March 2025Allow2200NoNo
18138338SUCCESSIVE-APPROXIMATION ANALOG-TO-DIGITAL CONVERTERSApril 2023June 2024Allow1410NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NGUYEN, KHAI M.

Strategic Value of Filing an Appeal

Total Appeal Filings
3
Allowed After Appeal Filing
2
(66.7%)
Not Allowed After Appeal Filing
1
(33.3%)
Filing Benefit Percentile
92.1%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 66.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner NGUYEN, KHAI M - Prosecution Strategy Guide

Executive Summary

Examiner NGUYEN, KHAI M works in Art Unit 2845 and has examined 952 patent applications in our dataset. With an allowance rate of 97.5%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 11 months.

Allowance Patterns

Examiner NGUYEN, KHAI M's allowance rate of 97.5% places them in the 89% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by NGUYEN, KHAI M receive 0.50 office actions before reaching final disposition. This places the examiner in the 2% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NGUYEN, KHAI M is 11 months. This places the examiner in the 100% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.5% benefit to allowance rate for applications examined by NGUYEN, KHAI M. This interview benefit is in the 18% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 41.9% of applications are subsequently allowed. This success rate is in the 93% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 52.6% of cases where such amendments are filed. This entry rate is in the 79% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 93% percentile among all examiners. Of these withdrawals, 33.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 39.4% are granted (fully or in part). This grant rate is in the 29% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 1.8% of allowed cases (in the 73% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.4% of allowed cases (in the 70% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.